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264 lines
14 KiB
TableGen
264 lines
14 KiB
TableGen
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//===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Chris Lattner and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines all of the X86-specific intrinsics.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// SSE1
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// Arithmetic ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_addss : GCCBuiltin<"__builtin_ia32_addss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_addps : GCCBuiltin<"__builtin_ia32_addps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_subss : GCCBuiltin<"__builtin_ia32_subss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_subps : GCCBuiltin<"__builtin_ia32_subps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_mulss : GCCBuiltin<"__builtin_ia32_mulss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_mulps : GCCBuiltin<"__builtin_ia32_mulps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_divss : GCCBuiltin<"__builtin_ia32_divss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_divps : GCCBuiltin<"__builtin_ia32_divps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_sqrtss : GCCBuiltin<"__builtin_ia32_sqrtss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_sqrtps : GCCBuiltin<"__builtin_ia32_sqrtps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_rcpss : GCCBuiltin<"__builtin_ia32_rcpss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_rcpps : GCCBuiltin<"__builtin_ia32_rcpps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_rsqrtss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_rsqrtps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_minss : GCCBuiltin<"__builtin_ia32_minss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_minps : GCCBuiltin<"__builtin_ia32_minps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_maxss : GCCBuiltin<"__builtin_ia32_maxss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_maxps : GCCBuiltin<"__builtin_ia32_maxps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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}
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// Logical ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_andps : GCCBuiltin<"__builtin_ia32_andps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_andnotps : GCCBuiltin<"__builtin_ia32_andnotps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_orps : GCCBuiltin<"__builtin_ia32_orps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_xorps : GCCBuiltin<"__builtin_ia32_xorps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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}
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// Comparison ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_cmpeqss : GCCBuiltin<"__builtin_ia32_cmpeqss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpeqps : GCCBuiltin<"__builtin_ia32_cmpeqps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpltss : GCCBuiltin<"__builtin_ia32_cmpltss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpltps : GCCBuiltin<"__builtin_ia32_cmpltps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpless : GCCBuiltin<"__builtin_ia32_cmpless">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpleps : GCCBuiltin<"__builtin_ia32_cmpleps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpgtss : GCCBuiltin<"__builtin_ia32_cmpgtss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpgtps : GCCBuiltin<"__builtin_ia32_cmpgtps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpgess : GCCBuiltin<"__builtin_ia32_cmpgess">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpgeps : GCCBuiltin<"__builtin_ia32_cmpgeps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpneqss : GCCBuiltin<"__builtin_ia32_cmpneqss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpneqps : GCCBuiltin<"__builtin_ia32_cmpneqps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnltss : GCCBuiltin<"__builtin_ia32_cmpnltss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnltps : GCCBuiltin<"__builtin_ia32_cmpnltps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnless : GCCBuiltin<"__builtin_ia32_cmpnless">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnleps : GCCBuiltin<"__builtin_ia32_cmpnleps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpngtss : GCCBuiltin<"__builtin_ia32_cmpngtss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpngtps : GCCBuiltin<"__builtin_ia32_cmpngtps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpngess : GCCBuiltin<"__builtin_ia32_cmpngess">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpngeps : GCCBuiltin<"__builtin_ia32_cmpngeps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpordss : GCCBuiltin<"__builtin_ia32_cmpordss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpordps : GCCBuiltin<"__builtin_ia32_cmpordps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpunordss : GCCBuiltin<"__builtin_ia32_cmpunordss">,
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Intrinsic<[llvm_float_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cmpunordps : GCCBuiltin<"__builtin_ia32_cmpunordps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comieqss : GCCBuiltin<"__builtin_ia32_comieq">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_comiltss : GCCBuiltin<"__builtin_ia32_comilt">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_comiless : GCCBuiltin<"__Builtin_ia32_comile">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_comigtss : GCCBuiltin<"__builtin_ia32_comigt">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_comigess : GCCBuiltin<"__builtin_ia32_comige">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_comineqss : GCCBuiltin<"__builtin_ia32_comineq">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_ucomieqss : GCCBuiltin<"__builtin_ia32_ucomieq">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_ucomiltss : GCCBuiltin<"__builtin_ia32_ucomilt">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_ucomiless : GCCBuiltin<"__Builtin_ia32_ucomile">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_ucomigtss : GCCBuiltin<"__builtin_ia32_ucomigt">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_ucomigess : GCCBuiltin<"__builtin_ia32_ucomige">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_ucomineqss : GCCBuiltin<"__builtin_ia32_ucomineq">,
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Intrinsic<[llvm_int_ty, llvm_float_ty,
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llvm_float_ty], [InstrNoMem]>;
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}
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// Conversion ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
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Intrinsic<[llvm_int_ty, llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">,
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Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [InstrNoMem]>;
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def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
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Intrinsic<[llvm_int_ty, llvm_float_ty], [InstrNoMem]>;
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def int_x86_sse_cvttps2pi : GCCBuiltin<"__builtin_ia32_cvttps2pi">,
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Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [InstrNoMem]>;
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def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
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Intrinsic<[llvm_float_ty, llvm_int_ty], [InstrNoMem]>;
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def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v2i32_ty], [InstrNoMem]>;
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}
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// SIMD load ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_loadhps : GCCBuiltin<"__builtin_ia32_loadhps">,
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Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_sse_loadlps : GCCBuiltin<"__builtin_ia32_loadlps">,
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Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_sse_loadups : GCCBuiltin<"__builtin_ia32_loadups">,
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Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
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}
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// SIMD store ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_storehps : GCCBuiltin<"__builtin_ia32_storehps">,
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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def int_x86_sse_storelps : GCCBuiltin<"__builtin_ia32_storelps">,
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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def int_x86_sse_storeups : GCCBuiltin<"__builtin_ia32_storeups">,
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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}
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// Cacheability support ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_prefetch : GCCBuiltin<"__builtin_ia32_prefetch">,
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Intrinsic<[llvm_ptr_ty, llvm_int_ty], [IntrWriteMem]>;
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def int_x86_sse_movntq : GCCBuiltin<"__builtin_ia32_movntq">,
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Intrinsic<[llvm_ptr_ty, llvm_v2i32_ty], [IntrWriteMem]>;
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||
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def int_x86_sse_movntps : GCCBuiltin<"__builtin_ia32_movntps">,
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||
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|
Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
|
||
|
|
def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
|
||
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|
Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
|
||
|
|
def int_x86_sse_movmskps : GCCBuiltin<"__builtin_ia32_movmskps">,
|
||
|
|
Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
|
||
|
|
def int_x86_sse_ldmxcsr : GCCBuiltin<"__builtin_ia32_ldmxcsr">,
|
||
|
|
Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
|
||
|
|
}
|
||
|
|
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
// SSE2
|
||
|
|
|
||
|
|
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
|
||
|
|
def int_x86_sse2_movmskpd : GCCBuiltin<"__builtin_ia32_movmskpd">,
|
||
|
|
Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [InstrNoMem]>;
|
||
|
|
}
|