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llvm-mirror/test/CodeGen/Hexagon/mpy.ll

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Enable all Hexagon tests. llvm-svn: 156824
2012-05-15 18:13:12 +02:00
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
Hexagon backend support llvm-svn: 146412
2011-12-12 22:14:40 +01:00
; CHECK: += mpyi
define void @foo(i32 %acc, i32 %num, i32 %num2) nounwind {
entry:
%acc.addr = alloca i32, align 4
%num.addr = alloca i32, align 4
%num2.addr = alloca i32, align 4
store i32 %acc, i32* %acc.addr, align 4
store i32 %num, i32* %num.addr, align 4
store i32 %num2, i32* %num2.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-27 22:17:42 +01:00
%0 = load i32, i32* %num.addr, align 4
%1 = load i32, i32* %acc.addr, align 4
Hexagon backend support llvm-svn: 146412
2011-12-12 22:14:40 +01:00
%mul = mul nsw i32 %0, %1
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-27 22:17:42 +01:00
%2 = load i32, i32* %num2.addr, align 4
Hexagon backend support llvm-svn: 146412
2011-12-12 22:14:40 +01:00
%add = add nsw i32 %mul, %2
store i32 %add, i32* %num.addr, align 4
ret void
}
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