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llvm-mirror/test/CodeGen/Mips/hf1_body.ll

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[mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
2015-10-15 16:34:23 +02:00
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=picfp16
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
@x = external global float
; Function Attrs: nounwind
define void @v_sf(float %p) #0 {
entry:
%p.addr = alloca float, align 4
store float %p, float* %p.addr, align 4
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-27 22:17:42 +01:00
%0 = load float, float* %p.addr, align 4
Fix a bad typo in the inline assembly code for mips16 pic fp stubs and make one cosmetic cleanup to make it look the same as gcc in this area; adjusting test cases. llvm-svn: 191400
2013-09-25 22:58:50 +02:00
store float %0, float* @x, align 4
ret void
}
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 16:16:52 +02:00
; picfp16: .ent __fn_stub_v_sf
; picfp16: .cpload $25
; picfp16: .set reorder
[mips][mips16] Re-work the inline assembly stubs to work with IAS. NFC. Summary: Previously, we were inserting an InlineAsm statement for each line of the inline assembly. This works for GAS but it triggers prologue/epilogue emission when IAS is in use. This caused: .set noreorder .cpload $25 to be emitted as: .set push .set reorder .set noreorder .set pop .set push .set reorder .cpload $25 .set pop which led to assembler errors and caused the test to fail. The whitespace-after-comma changes included in this patch are necessary to match the output when IAS is in use. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13653 llvm-svn: 250895
2015-10-21 14:44:14 +02:00
; picfp16: .reloc 0, R_MIPS_NONE, v_sf
; picfp16: la $25, $__fn_local_v_sf
; picfp16: mfc1 $4, $f12
[mips] Whitespace cleanup in MIPS16 tests to reduce noise in following changes. NFC. Mostly tabs -> spaces and double spacing. llvm-svn: 250041
2015-10-12 16:16:52 +02:00
; picfp16: jr $25
; picfp16: .end __fn_stub_v_sf
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