RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-01 00:12:50 +01:00
Code Issues Projects Releases Wiki Activity
0b6bcb6e06
llvm-mirror/test/CodeGen/X86/legalize-shift-64.ll

57 lines
1.3 KiB
LLVM
Raw Normal View History

This patch adds X86 instruction itineraries for non-pseudo opcodes in X86InstrCompiler.td. It also adds –mcpu-generic to the legalize-shift-64.ll test so the test will pass if run on an Intel Atom CPU, which would otherwise produce an instruction schedule which differs from that which the test expects. llvm-svn: 153033
2012-03-19 15:10:12 +01:00
; RUN: llc -mcpu=generic -march=x86 < %s | FileCheck %s
LegalizeIntegerTypes: Reenable the large shift with small amount optimization. To avoid problems with zero shifts when getting the bits that move between words we use a trick: first shift the by amount-1, then do another shift by one. When amount is 0 (and size 32) we first shift by 31, then by one, instead of by 32. Also fix a latent bug that emitted the low and high words in the wrong order when shifting right. Fixes PR12113. llvm-svn: 151637
2012-02-28 18:58:00 +01:00
define i64 @test1(i32 %xx, i32 %test) nounwind {
%conv = zext i32 %xx to i64
%and = and i32 %test, 7
%sh_prom = zext i32 %and to i64
%shl = shl i64 %conv, %sh_prom
ret i64 %shl
; CHECK: test1:
; CHECK: shll %cl, %eax
LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" optimization, making the lives of later passes easier. llvm-svn: 151722
2012-02-29 14:27:00 +01:00
; CHECK: shrl %edx
LegalizeIntegerTypes: Reenable the large shift with small amount optimization. To avoid problems with zero shifts when getting the bits that move between words we use a trick: first shift the by amount-1, then do another shift by one. When amount is 0 (and size 32) we first shift by 31, then by one, instead of by 32. Also fix a latent bug that emitted the low and high words in the wrong order when shifting right. Fixes PR12113. llvm-svn: 151637
2012-02-28 18:58:00 +01:00
; CHECK: xorb $31
; CHECK: shrl %cl, %edx
}
define i64 @test2(i64 %xx, i32 %test) nounwind {
%and = and i32 %test, 7
%sh_prom = zext i32 %and to i64
%shl = shl i64 %xx, %sh_prom
ret i64 %shl
; CHECK: test2:
; CHECK: shll %cl, %esi
LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" optimization, making the lives of later passes easier. llvm-svn: 151722
2012-02-29 14:27:00 +01:00
; CHECK: shrl %edx
LegalizeIntegerTypes: Reenable the large shift with small amount optimization. To avoid problems with zero shifts when getting the bits that move between words we use a trick: first shift the by amount-1, then do another shift by one. When amount is 0 (and size 32) we first shift by 31, then by one, instead of by 32. Also fix a latent bug that emitted the low and high words in the wrong order when shifting right. Fixes PR12113. llvm-svn: 151637
2012-02-28 18:58:00 +01:00
; CHECK: xorb $31
; CHECK: shrl %cl, %edx
; CHECK: orl %esi, %edx
; CHECK: shll %cl, %eax
}
define i64 @test3(i64 %xx, i32 %test) nounwind {
%and = and i32 %test, 7
%sh_prom = zext i32 %and to i64
%shr = lshr i64 %xx, %sh_prom
ret i64 %shr
; CHECK: test3:
; CHECK: shrl %cl, %esi
LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" optimization, making the lives of later passes easier. llvm-svn: 151722
2012-02-29 14:27:00 +01:00
; CHECK: leal (%edx,%edx), %eax
LegalizeIntegerTypes: Reenable the large shift with small amount optimization. To avoid problems with zero shifts when getting the bits that move between words we use a trick: first shift the by amount-1, then do another shift by one. When amount is 0 (and size 32) we first shift by 31, then by one, instead of by 32. Also fix a latent bug that emitted the low and high words in the wrong order when shifting right. Fixes PR12113. llvm-svn: 151637
2012-02-28 18:58:00 +01:00
; CHECK: xorb $31, %cl
; CHECK: shll %cl, %eax
; CHECK: orl %esi, %eax
; CHECK: shrl %cl, %edx
}
define i64 @test4(i64 %xx, i32 %test) nounwind {
%and = and i32 %test, 7
%sh_prom = zext i32 %and to i64
%shr = ashr i64 %xx, %sh_prom
ret i64 %shr
; CHECK: test4:
; CHECK: shrl %cl, %esi
LegalizeIntegerTypes: Reorder operations in the "big shift by small amount" optimization, making the lives of later passes easier. llvm-svn: 151722
2012-02-29 14:27:00 +01:00
; CHECK: leal (%edx,%edx), %eax
LegalizeIntegerTypes: Reenable the large shift with small amount optimization. To avoid problems with zero shifts when getting the bits that move between words we use a trick: first shift the by amount-1, then do another shift by one. When amount is 0 (and size 32) we first shift by 31, then by one, instead of by 32. Also fix a latent bug that emitted the low and high words in the wrong order when shifting right. Fixes PR12113. llvm-svn: 151637
2012-02-28 18:58:00 +01:00
; CHECK: xorb $31, %cl
; CHECK: shll %cl, %eax
; CHECK: orl %esi, %eax
; CHECK: sarl %cl, %edx
}
Reference in New Issue Copy Permalink