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28 lines
456 B
Plaintext
28 lines
456 B
Plaintext
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Common register allocation / spilling problem:
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mul lr, r4, lr
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str lr, [sp, #+52]
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ldr lr, [r1, #+32]
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sxth r3, r3
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ldr r4, [sp, #+52]
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mla r4, r3, lr, r4
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can be:
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mul lr, r4, lr
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mov r4, lr
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str lr, [sp, #+52]
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ldr lr, [r1, #+32]
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sxth r3, r3
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mla r4, r3, lr, r4
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and then "merge" mul and mov:
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mul r4, r4, lr
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str lr, [sp, #+52]
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ldr lr, [r1, #+32]
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sxth r3, r3
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mla r4, r3, lr, r4
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It also increase the likelyhood the store may become dead.
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