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llvm-mirror/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt

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# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep "invalid instruction encoding"
# Opcode=1839 Name=VST1d8Twb_register Format=ARM_FORMAT_NLdSt(30)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 1| 1: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 0: 0: 1: 0| 1: 1: 1: 1|
# -------------------------------------------------------------------------------------------------
#
# A8.6.391 VST1 (multiple single elements)
# This encoding looks like: vst1.8 {d0,d1,d2}, [r0, :128]
# But bits 5-4 for the alignment of 128 encoded as align = 0b10, is available only if <list>
# contains two or four registers. rdar://11220250
0x00 0xf9 0x2f 0x06