2015-06-30 01:51:55 +02:00
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//==- WebAssemblyTargetTransformInfo.h - WebAssembly-specific TTI -*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file a TargetTransformInfo::Concept conforming object specific
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/// to the WebAssembly target machine.
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///
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/// It uses the target's detailed information to provide more precise answers to
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/// certain TTI queries, while letting the target independent and default TTI
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/// implementations handle the rest.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETTRANSFORMINFO_H
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#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETTRANSFORMINFO_H
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#include "WebAssemblyTargetMachine.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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#include <algorithm>
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namespace llvm {
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class WebAssemblyTTIImpl final : public BasicTTIImplBase<WebAssemblyTTIImpl> {
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typedef BasicTTIImplBase<WebAssemblyTTIImpl> BaseT;
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typedef TargetTransformInfo TTI;
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friend BaseT;
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const WebAssemblySubtarget *ST;
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const WebAssemblyTargetLowering *TLI;
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const WebAssemblySubtarget *getST() const { return ST; }
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const WebAssemblyTargetLowering *getTLI() const { return TLI; }
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public:
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2015-09-17 01:59:57 +02:00
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WebAssemblyTTIImpl(const WebAssemblyTargetMachine *TM, const Function &F)
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2015-07-09 23:00:09 +02:00
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: BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
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2015-06-30 01:51:55 +02:00
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TLI(ST->getTargetLowering()) {}
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/// \name Scalar TTI Implementations
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/// @{
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// TODO: Implement more Scalar TTI for WebAssembly
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2015-08-24 18:51:46 +02:00
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TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) const;
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2015-06-30 01:51:55 +02:00
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/// @}
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/// \name Vector TTI Implementations
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/// @{
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2016-05-24 00:47:07 +02:00
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unsigned getNumberOfRegisters(bool Vector);
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unsigned getRegisterBitWidth(bool Vector);
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unsigned getArithmeticInstrCost(
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unsigned Opcode, Type *Ty,
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TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
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TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
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TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
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[X86] updating TTI costs for arithmetic instructions on X86\SLM arch.
updated instructions:
pmulld, pmullw, pmulhw, mulsd, mulps, mulpd, divss, divps, divsd, divpd, addpd and subpd.
special optimization case which replaces pmulld with pmullw\pmulhw\pshuf seq.
In case if the real operands bitwidth <= 16.
Differential Revision: https://reviews.llvm.org/D28104
llvm-svn: 291657
2017-01-11 09:23:37 +01:00
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TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
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ArrayRef<const Value *> Args = ArrayRef<const Value *>());
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2016-05-24 00:47:07 +02:00
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unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
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2015-06-30 01:51:55 +02:00
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/// @}
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};
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} // end namespace llvm
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#endif
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