llvm-mirror/lib/Target/X86/X86RegisterInfo.h

//===- X86RegisterInfo.h - X86 Register Information Impl --------*- C++ -*-===//
// 
//                     The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
// 
//===----------------------------------------------------------------------===//
//
// This file contains the X86 implementation of the MRegisterInfo class.
//
//===----------------------------------------------------------------------===//

#ifndef X86REGISTERINFO_H
#define X86REGISTERINFO_H

#include "llvm/Target/MRegisterInfo.h"

class Type;

#include "X86GenRegisterInfo.h.inc"

struct X86RegisterInfo : public X86GenRegisterInfo {
  X86RegisterInfo();
  const TargetRegisterClass* getRegClassForType(const Type* Ty) const;

  /// Code Generation virtual methods...
  int storeRegToStackSlot(MachineBasicBlock &MBB,
                          MachineBasicBlock::iterator &MBBI,
                          unsigned SrcReg, int FrameIndex,
                          const TargetRegisterClass *RC) const;

  int loadRegFromStackSlot(MachineBasicBlock &MBB,
                           MachineBasicBlock::iterator &MBBI,
                           unsigned DestReg, int FrameIndex,
                           const TargetRegisterClass *RC) const;
  
  int copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
		   unsigned DestReg, unsigned SrcReg,
		   const TargetRegisterClass *RC) const;

  int eliminateCallFramePseudoInstr(MachineFunction &MF,
                                    MachineBasicBlock &MBB,
                                    MachineBasicBlock::iterator &I) const;

  int eliminateFrameIndex(MachineFunction &MF,
                          MachineBasicBlock::iterator &II) const;

  int processFunctionBeforeFrameFinalized(MachineFunction &MF) const;

  int emitPrologue(MachineFunction &MF) const;
  int emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
};

#endif
Changes to match new MRegisterInfo api llvm-svn: 5187 2002-12-28 21:32:54 +01:00			`//===- X86RegisterInfo.h - X86 Register Information Impl --------- C++ --===//`
Added LLVM copyright header. llvm-svn: 9321 2003-10-21 17:17:13 +02:00			`//`
			`// The LLVM Compiler Infrastructure`
			`//`
			`// This file was developed by the LLVM research group and is distributed under`
			`// the University of Illinois Open Source License. See LICENSE.TXT for details.`
			`//`
			`//===----------------------------------------------------------------------===//`
Initial checkin of X86 backend. We can instruction select exactly one instruction 'ret void'. Wow. llvm-svn: 4284 2002-10-26 00:55:53 +02:00			`//`
			`// This file contains the X86 implementation of the MRegisterInfo class.`
			`//`
			`//===----------------------------------------------------------------------===//`

			`#ifndef X86REGISTERINFO_H`
			`#define X86REGISTERINFO_H`

			`#include "llvm/Target/MRegisterInfo.h"`

Add definitions for function headers from MRegisterInfo.h: Some functions are in X86RegisterInfo.cpp, others, because of the data they need, are in X86RegisterClasses.cpp, which also defines some register classes: byte, short, and int. llvm-svn: 4784 2002-11-20 19:59:43 +01:00			`class Type;`

Switch over to TableGen generated register file description llvm-svn: 7511 2003-08-03 17:48:14 +02:00			`#include "X86GenRegisterInfo.h.inc"`
Adjustments to match new simpler spill interface llvm-svn: 5147 2002-12-25 06:06:43 +01:00
Switch over to TableGen generated register file description llvm-svn: 7511 2003-08-03 17:48:14 +02:00			`struct X86RegisterInfo : public X86GenRegisterInfo {`
			`X86RegisterInfo();`
Changes to match new MRegisterInfo api llvm-svn: 5187 2002-12-28 21:32:54 +01:00			`const TargetRegisterClass* getRegClassForType(const Type* Ty) const;`
Adjustments to match new simpler spill interface llvm-svn: 5147 2002-12-25 06:06:43 +01:00
Changes to match new MRegisterInfo api llvm-svn: 5187 2002-12-28 21:32:54 +01:00			`/// Code Generation virtual methods...`
Change all machine basic block modifier functions in MRegisterInfo to return the number of instructions added to/removed from the basic block passed as their first argument. Note: This is only needed because we use a std::vector instead of an ilist to keep MachineBasicBlock instructions. Inserting an instruction to a MachineBasicBlock invalidates all iterators to the basic block. The return value can be used to update an index to the machine basic block instruction vector and circumvent the iterator elimination problem but this is really not needed if we move to a better representation. llvm-svn: 9704 2003-11-04 23:57:09 +01:00			`int storeRegToStackSlot(MachineBasicBlock &MBB,`
			`MachineBasicBlock::iterator &MBBI,`
			`unsigned SrcReg, int FrameIndex,`
			`const TargetRegisterClass *RC) const;`

			`int loadRegFromStackSlot(MachineBasicBlock &MBB,`
			`MachineBasicBlock::iterator &MBBI,`
			`unsigned DestReg, int FrameIndex,`
			`const TargetRegisterClass *RC) const;`
Changes to match new MRegisterInfo api llvm-svn: 5187 2002-12-28 21:32:54 +01:00
Change all machine basic block modifier functions in MRegisterInfo to return the number of instructions added to/removed from the basic block passed as their first argument. Note: This is only needed because we use a std::vector instead of an ilist to keep MachineBasicBlock instructions. Inserting an instruction to a MachineBasicBlock invalidates all iterators to the basic block. The return value can be used to update an index to the machine basic block instruction vector and circumvent the iterator elimination problem but this is really not needed if we move to a better representation. llvm-svn: 9704 2003-11-04 23:57:09 +01:00			`int copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,`
Adjustments to match new simpler spill interface llvm-svn: 5147 2002-12-25 06:06:43 +01:00			`unsigned DestReg, unsigned SrcReg,`
			`const TargetRegisterClass *RC) const;`

Change all machine basic block modifier functions in MRegisterInfo to return the number of instructions added to/removed from the basic block passed as their first argument. Note: This is only needed because we use a std::vector instead of an ilist to keep MachineBasicBlock instructions. Inserting an instruction to a MachineBasicBlock invalidates all iterators to the basic block. The return value can be used to update an index to the machine basic block instruction vector and circumvent the iterator elimination problem but this is really not needed if we move to a better representation. llvm-svn: 9704 2003-11-04 23:57:09 +01:00			`int eliminateCallFramePseudoInstr(MachineFunction &MF,`
			`MachineBasicBlock &MBB,`
			`MachineBasicBlock::iterator &I) const;`
Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to PHI nodes. llvm-svn: 5001 2002-12-13 10:54:12 +01:00
Change all machine basic block modifier functions in MRegisterInfo to return the number of instructions added to/removed from the basic block passed as their first argument. Note: This is only needed because we use a std::vector instead of an ilist to keep MachineBasicBlock instructions. Inserting an instruction to a MachineBasicBlock invalidates all iterators to the basic block. The return value can be used to update an index to the machine basic block instruction vector and circumvent the iterator elimination problem but this is really not needed if we move to a better representation. llvm-svn: 9704 2003-11-04 23:57:09 +01:00			`int eliminateFrameIndex(MachineFunction &MF,`
			`MachineBasicBlock::iterator &II) const;`
Add definitions for function headers from MRegisterInfo.h: Some functions are in X86RegisterInfo.cpp, others, because of the data they need, are in X86RegisterClasses.cpp, which also defines some register classes: byte, short, and int. llvm-svn: 4784 2002-11-20 19:59:43 +01:00
Change all machine basic block modifier functions in MRegisterInfo to return the number of instructions added to/removed from the basic block passed as their first argument. Note: This is only needed because we use a std::vector instead of an ilist to keep MachineBasicBlock instructions. Inserting an instruction to a MachineBasicBlock invalidates all iterators to the basic block. The return value can be used to update an index to the machine basic block instruction vector and circumvent the iterator elimination problem but this is really not needed if we move to a better representation. llvm-svn: 9704 2003-11-04 23:57:09 +01:00			`int processFunctionBeforeFrameFinalized(MachineFunction &MF) const;`
Added support for callee- and caller-save registers. llvm-svn: 4897 2002-12-04 00:11:21 +01:00
Change all machine basic block modifier functions in MRegisterInfo to return the number of instructions added to/removed from the basic block passed as their first argument. Note: This is only needed because we use a std::vector instead of an ilist to keep MachineBasicBlock instructions. Inserting an instruction to a MachineBasicBlock invalidates all iterators to the basic block. The return value can be used to update an index to the machine basic block instruction vector and circumvent the iterator elimination problem but this is really not needed if we move to a better representation. llvm-svn: 9704 2003-11-04 23:57:09 +01:00			`int emitPrologue(MachineFunction &MF) const;`
			`int emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;`
Initial checkin of X86 backend. We can instruction select exactly one instruction 'ret void'. Wow. llvm-svn: 4284 2002-10-26 00:55:53 +02:00			`};`

			`#endif`