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184 lines
4.4 KiB
Plaintext
184 lines
4.4 KiB
Plaintext
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# RUN: llc -mtriple=aarch64--- -run-pass=machine-outliner \
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# RUN: -verify-machineinstrs %s -o - | FileCheck %s
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# Ensure that we don't outline from regions where x16, x17, or nzcv are live
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# across the outlining candidate. These values are allowed to be clobbered by,
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# say, the linker, in the presence of function calls. Thus, we can't outline
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# these, since the insertion of the outlined call could change the values of
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# these registers.
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--- |
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; No problematic register appears at all. Safe for outlining.
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define void @reg_never_defined() #0 { ret void }
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; A problematic register is live, but after the candidate. Safe for outlining.
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define void @reg_defined_after_candidate() #0 { ret void }
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; A problematic register is live before the candidate, but killed before
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; entry to the candidate. Safe for outlining.
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define void @reg_killed_before_candidate() #0 { ret void }
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; Ensure that we never outline when any of the problematic registers we care
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; about are defined across the outlining candidate.
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define void @x16_live() #0 { ret void }
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define void @x17_live() #0 { ret void }
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define void @nzcv_live() #0 { ret void }
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; Test a combination of the above behaviours.
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; [candidate] (1)
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; - define a bad register -
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; [candidate] (2)
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; - kill the bad register -
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; [candidate] (3)
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;
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; (1) and (3) should be outlined, while (2) should not be outlined.
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define void @multiple_ranges() #0 { ret void }
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attributes #0 = { noredzone }
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...
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---
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# There should be two calls to outlined functions here, since we haven't tripped
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# any of the cases above.
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name: reg_never_defined
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: bb.0:
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; CHECK: BL
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liveins: $w8, $wzr
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$w8 = ORRWri $wzr, 1
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$w8 = ORRWri $wzr, 2
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$w8 = ORRWri $wzr, 3
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$w8 = ORRWri $wzr, 4
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bb.1:
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; CHECK-LABEL: bb.1:
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; CHECK: BL
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liveins: $w8, $wzr
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$w8 = ORRWri $wzr, 1
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$w8 = ORRWri $wzr, 2
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$w8 = ORRWri $wzr, 3
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$w8 = ORRWri $wzr, 4
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bb.2:
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RET undef $lr
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...
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---
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name: reg_defined_after_candidate
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: bb.0:
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; CHECK: BL
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; CHECK-NEXT: $x16 = ORRXri $x8, 5, implicit-def $x16, implicit-def $w16
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liveins: $w8, $wzr
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$w8 = ORRWri $wzr, 1
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$w8 = ORRWri $wzr, 2
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$w8 = ORRWri $wzr, 3
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$w8 = ORRWri $wzr, 4
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$x16 = ORRXri $x8, 5, implicit-def $x16, implicit-def $w16
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$w8 = ORRWri $w16, 5
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RET undef $lr
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...
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---
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name: reg_killed_before_candidate
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: bb.0:
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; CHECK: BL
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liveins: $w8, $wzr, $x16
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dead $x16 = ORRXri $x8, 6
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$w8 = ORRWri $wzr, 1
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$w8 = ORRWri $wzr, 2
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$w8 = ORRWri $wzr, 3
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$w8 = ORRWri $wzr, 4
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RET undef $lr
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...
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---
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name: x16_live
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: bb.0:
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; CHECK-NOT: BL
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liveins: $w8, $wzr, $x16
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$w8 = ORRWri $wzr, 1
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$w8 = ORRWri $wzr, 2
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$w8 = ORRWri $wzr, 3
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$w8 = ORRWri $wzr, 4
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bb.1:
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liveins: $x16
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RET undef $lr
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...
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---
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name: x17_live
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: bb.0:
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; CHECK-NOT: BL
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liveins: $w8, $wzr, $x17
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$w8 = ORRWri $wzr, 1
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$w8 = ORRWri $wzr, 2
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$w8 = ORRWri $wzr, 3
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$w8 = ORRWri $wzr, 4
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$w8 = ORRWri $w17, 5
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RET undef $lr
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...
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---
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name: nzcv_live
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w8, $wzr, $nzcv
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; CHECK-LABEL: bb.0:
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; CHECK-NOT: BL
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$w8 = ORRWri $wzr, 1
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$w8 = ORRWri $wzr, 2
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$w8 = ORRWri $wzr, 3
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$w8 = ORRWri $wzr, 4
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bb.1:
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liveins: $nzcv
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RET undef $lr
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...
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---
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name: multiple_ranges
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tracksRegLiveness: true
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body: |
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bb.0:
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; CHECK-LABEL: bb.0:
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; CHECK: BL
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liveins: $w8, $wzr
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$w8 = ORRWri $wzr, 1
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$w8 = ORRWri $wzr, 2
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$w8 = ORRWri $wzr, 3
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$w8 = ORRWri $wzr, 4
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$x16 = ORRXri $x8, 5, implicit-def $x16
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bb.1:
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; CHECK-LABEL: bb.1:
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; CHECK-NOT: BL
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liveins: $w8, $x16
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$w8 = ORRWri $wzr, 1
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$w8 = ORRWri $wzr, 2
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$w8 = ORRWri $wzr, 3
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$w8 = ORRWri $wzr, 4
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bb.2:
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; CHECK-LABEL: bb.2:
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; CHECK: BL
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liveins: $w8, $x16
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dead $x16 = ORRXri $x8, 0
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$w8 = ORRWri $wzr, 1
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$w8 = ORRWri $wzr, 2
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$w8 = ORRWri $wzr, 3
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$w8 = ORRWri $wzr, 4
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bb.3:
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liveins: $w8
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RET undef $lr
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...
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---
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