llvm-mirror/test/CodeGen/R600/anyext.ll

; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s

; CHECK-LABEL: {{^}}anyext_i1_i32:
; CHECK: v_cndmask_b32_e64
define void @anyext_i1_i32(i32 addrspace(1)* %out, i32 %cond) {
entry:
  %0 = icmp eq i32 %cond, 0
  %1 = zext i1 %0 to i8
  %2 = xor i8 %1, -1
  %3 = and i8 %2, 1
  %4 = zext i8 %3 to i32
  store i32 %4, i32 addrspace(1)* %out
  ret void
}
R600/SI: Add a stub GCNTargetMachine This is equivalent to the AMDGPUTargetMachine now, but it is the starting point for separating R600 and GCN functionality into separate targets. It is recommened that users start using the gcn triple for GCN-based GPUs, because using the r600 triple for these GPUs will be deprecated in the future. llvm-svn: 225277 2015-01-06 19:00:21 +01:00			`; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs \| FileCheck %s`
R600/SI: Add a pattern for i32 anyext Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 201370 2014-02-14 00:34:13 +01:00
R600: Call EmitFunctionHeader() in the AsmPrinter to populate the ELF symbol table llvm-svn: 218776 2014-10-01 19:15:17 +02:00			`; CHECK-LABEL: {{^}}anyext_i1_i32:`
R600/SI: Change all instruction assembly names to lowercase. This matches the format produced by the AMD proprietary driver. //==================================================================// // Shell script for converting .ll test cases: (Pass the .ll files you want to convert to this script as arguments). //==================================================================// ; This was necessary on my system so that A-Z in sed would match only ; upper case. I'm not sure why. export LC_ALL='C' TEST_FILES="$" MATCHES=`grep -v Patterns SIInstructions.td \| grep -o '"[A-Z0-9_]\+["e]' \| grep -o '[A-Z0-9_]\+' \| sort -r` for f in $TEST_FILES; do # Check that there are SI tests: grep -q -e 'verde' -e 'bonaire' -e 'SI' -e 'tahiti' $f if [ $? -eq 0 ]; then for match in $MATCHES; do sed -i -e "s/\([ :]$match\)/\L\1/" $f done # Try to get check lines with partial instruction names sed -i 's/\(;[ ]SI[A-Z\\-]: \)\([A-Z_0-9]\+\)/\1\L\2/' $f fi done sed -i -e 's/bb0_1/BB0_1/g' ../../../test/CodeGen/R600/infinite-loop.ll sed -i -e 's/SI-NOT: bfe/SI-NOT: {{[^@]}}bfe/g'../../../test/CodeGen/R600/llvm.AMDGPU.bfe.32.ll ../../../test/CodeGen/R600/sext-in-reg.ll sed -i -e 's/exp_IEEE/EXP_IEEE/g' ../../../test/CodeGen/R600/llvm.exp2.ll sed -i -e 's/numVgprs/NumVgprs/g' ../../../test/CodeGen/R600/register-count-comments.ll sed -i 's/\(; CHECK[-NOT]*: \)\([A-Z_0-9]\+\)/\1\L\2/' ../../../test/CodeGen/R600/select64.ll ../../../test/CodeGen/R600/sgpr-copy.ll //==================================================================// // Shell script for converting .td files (run this last) //==================================================================// export LC_ALL='C' sed -i -e '/Patterns/!s/\("[A-Z0-9_]\+[ "e]\)/\L\1/g' SIInstructions.td sed -i -e 's/"EXP/"exp/g' SIInstrInfo.td llvm-svn: 221350 2014-11-05 15:50:53 +01:00			`; CHECK: v_cndmask_b32_e64`
R600/SI: Add a pattern for i32 anyext Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 201370 2014-02-14 00:34:13 +01:00			`define void @anyext_i1_i32(i32 addrspace(1)* %out, i32 %cond) {`
			`entry:`
			`%0 = icmp eq i32 %cond, 0`
			`%1 = zext i1 %0 to i8`
			`%2 = xor i8 %1, -1`
			`%3 = and i8 %2, 1`
			`%4 = zext i8 %3 to i32`
			`store i32 %4, i32 addrspace(1)* %out`
			`ret void`
			`}`