llvm-mirror/test/CodeGen/AArch64/arm64-vsetcc_fp.ll

; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -asm-verbose=false | FileCheck %s
define <2 x i32> @fcmp_one(<2 x float> %x, <2 x float> %y) nounwind optsize readnone {
; CHECK-LABEL: fcmp_one:
; CHECK-NEXT: fcmgt.2s [[REG:v[0-9]+]], v0, v1
; CHECK-NEXT: fcmgt.2s [[REG2:v[0-9]+]], v1, v0
; CHECK-NEXT: orr.8b v0, [[REG2]], [[REG]]
; CHECK-NEXT: ret
  %tmp = fcmp one <2 x float> %x, %y
  %or = sext <2 x i1> %tmp to <2 x i32>
  ret <2 x i32> %or
}
[AARCH64] Enable AARCH64 lit tests on windows dev machines As discussed on PR27654, this patch fixes the triples of a lot of aarch64 tests and enables lit tests on windows This will hopefully help stop cases where windows developers break the aarch64 target Differential Revision: https://reviews.llvm.org/D22191 llvm-svn: 275973 2016-07-19 15:35:11 +02:00			`; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -asm-verbose=false \| FileCheck %s`
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090 2014-03-29 11:18:08 +01:00			`define <2 x i32> @fcmp_one(<2 x float> %x, <2 x float> %y) nounwind optsize readnone {`
			`; CHECK-LABEL: fcmp_one:`
			`; CHECK-NEXT: fcmgt.2s [[REG:v[0-9]+]], v0, v1`
			`; CHECK-NEXT: fcmgt.2s [[REG2:v[0-9]+]], v1, v0`
			`; CHECK-NEXT: orr.8b v0, [[REG2]], [[REG]]`
			`; CHECK-NEXT: ret`
			`%tmp = fcmp one <2 x float> %x, %y`
			`%or = sext <2 x i1> %tmp to <2 x i32>`
			`ret <2 x i32> %or`
			`}`