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llvm-mirror/include/llvm/IR/IntrinsicsVE.td

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[VE] Support vld intrinsics Add intrinsics for vector load instructions. Add a regression test also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D91332
2020-11-09 22:50:15 +01:00
// Define intrinsics written by hand
[VE] Add SVOB intrinsic instruction Add SVOB intrinsic instruction and a regression test. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D94279
2021-01-07 15:27:39 +01:00
// VEL Intrinsic instructions.
let TargetPrefix = "ve" in {
def int_ve_vl_svob : GCCBuiltin<"__builtin_ve_vl_svob">,
Intrinsic<[], [], [IntrHasSideEffects]>;
[VE] Support pack_f32p and pack_f32a intrinsic instructions Support pack_f32p and pack_f32a intrinsic instructions and regression tests. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D94296
2021-01-08 12:10:02 +01:00
def int_ve_vl_pack_f32p : GCCBuiltin<"__builtin_ve_vl_pack_f32p">,
Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_ptr_ty],
[IntrReadMem]>;
def int_ve_vl_pack_f32a : GCCBuiltin<"__builtin_ve_vl_pack_f32a">,
Intrinsic<[llvm_i64_ty], [llvm_ptr_ty],
[IntrReadMem]>;
[VE] Support intrinsic to isnert/extract_subreg of v512i1 Support insert/extract_subreg intrinsic instructions for v512i1 registers and add regression tests. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D94298
2021-01-08 12:29:42 +01:00
def int_ve_vl_extract_vm512u :
GCCBuiltin<"__builtin_ve_vl_extract_vm512u">,
Intrinsic<[LLVMType<v256i1>], [LLVMType<v512i1>], [IntrNoMem]>;
def int_ve_vl_extract_vm512l :
GCCBuiltin<"__builtin_ve_vl_extract_vm512l">,
Intrinsic<[LLVMType<v256i1>], [LLVMType<v512i1>], [IntrNoMem]>;
def int_ve_vl_insert_vm512u :
GCCBuiltin<"__builtin_ve_vl_insert_vm512u">,
Intrinsic<[LLVMType<v512i1>], [LLVMType<v512i1>, LLVMType<v256i1>],
[IntrNoMem]>;
def int_ve_vl_insert_vm512l :
GCCBuiltin<"__builtin_ve_vl_insert_vm512l">,
Intrinsic<[LLVMType<v512i1>], [LLVMType<v512i1>, LLVMType<v256i1>],
[IntrNoMem]>;
[VE] Add SVOB intrinsic instruction Add SVOB intrinsic instruction and a regression test. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D94279
2021-01-07 15:27:39 +01:00
}
[VE] Support vld intrinsics Add intrinsics for vector load instructions. Add a regression test also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D91332
2020-11-09 22:50:15 +01:00
// Define intrinsics automatically generated
include "llvm/IR/IntrinsicsVEVL.gen.td"
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