llvm-mirror/test/CodeGen/X86/2010-01-07-UAMemFeature.ll

; RUN: llc -mcpu=yonah -mattr=vector-unaligned-mem -march=x86 < %s | FileCheck %s
; CHECK: addps (

target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"

define <4 x float> @foo(<4 x float>* %P, <4 x float> %In) nounwind {
	%A = load <4 x float>* %P, align 4
	%B = add <4 x float> %A, %In
	ret <4 x float> %B
}
this test requires SSE, thanks to jyasskin for pointing this out. llvm-svn: 93360 2010-01-13 22:51:41 +01:00			`; RUN: llc -mcpu=yonah -mattr=vector-unaligned-mem -march=x86 < %s \| FileCheck %s`
reduce this to a sensible testcase. llvm-svn: 93189 2010-01-11 22:58:19 +01:00			`; CHECK: addps (`
Implement a feature (-vector-unaligned-mem) to allow targets to ignore alignment requirements for SIMD memory operands. This is useful on architectures like the AMD 10h that do not trap on unaligned references if a status bit is twiddled at startup time. llvm-svn: 93151 2010-01-11 17:29:42 +01:00
			`target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"`
			`target triple = "x86_64-unknown-linux-gnu"`

reduce this to a sensible testcase. llvm-svn: 93189 2010-01-11 22:58:19 +01:00			`define <4 x float> @foo(<4 x float>* %P, <4 x float> %In) nounwind {`
			`%A = load <4 x float>* %P, align 4`
			`%B = add <4 x float> %A, %In`
			`ret <4 x float> %B`
Implement a feature (-vector-unaligned-mem) to allow targets to ignore alignment requirements for SIMD memory operands. This is useful on architectures like the AMD 10h that do not trap on unaligned references if a status bit is twiddled at startup time. llvm-svn: 93151 2010-01-11 17:29:42 +01:00			`}`