llvm-mirror/test/CodeGen/MIR/X86/memory-operands.mir

# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
# This test ensures that the MIR parser parses the machine memory operands
# correctly.

--- |

  define i32 @test(i32* %a) {
  entry:
    %b = load i32, i32* %a
    store i32 42, i32* %a
    ret i32 %b
  }

  define void @test2(i32* %"a value") {
  entry2:
    %b = load i32, i32* %"a value"
    %c = add i32 %b, 1
    store i32 %c, i32* %"a value"
    ret void
  }

  define i32 @volatile_inc(i32* %x) {
  entry:
    %0 = load volatile i32, i32* %x
    %1 = add i32 %0, 1
    store volatile i32 %1, i32* %x
    ret i32 %1
  }

  define void @non_temporal_store(i32* %a, i32 %b) {
  entry:
    store i32 %b, i32* %a, align 16, !nontemporal !0
    ret void
  }

  !0 = !{i32 1}

  define i32 @invariant_load(i32* %x) {
  entry:
    %v = load i32, i32* %x, !invariant.load !1
    ret i32 %v
  }

  !1 = !{}

  define void @memory_offset(<8 x float>* %vec) {
  entry:
    %v = load <8 x float>, <8 x float>* %vec
    %v2 = insertelement <8 x float> %v, float 0.0, i32 4
    store <8 x float> %v2, <8 x float>* %vec
    ret void
  }

  define void @memory_alignment(<8 x float>* %vec) {
  entry:
    %v = load <8 x float>, <8 x float>* %vec
    %v2 = insertelement <8 x float> %v, float 0.0, i32 4
    store <8 x float> %v2, <8 x float>* %vec
    ret void
  }

...
---
name:            test
tracksRegLiveness: true
liveins:
  - { reg: '%rdi' }
body:
  - id:          0
    name:        entry
    liveins:     [ '%rdi' ]
    instructions:
# CHECK:      %eax = MOV32rm %rdi, 1, _, 0, _ :: (load 4 from %ir.a)
# CHECK-NEXT: MOV32mi killed %rdi, 1, _, 0, _, 42 :: (store 4 into %ir.a)
      - '%eax = MOV32rm %rdi, 1, _, 0, _ :: (load 4 from %ir.a)'
      - 'MOV32mi killed %rdi, 1, _, 0, _, 42 :: (store 4 into %ir.a)'
      - 'RETQ %eax'
...
---
name:            test2
tracksRegLiveness: true
liveins:
  - { reg: '%rdi' }
body:
  - id:          0
    name:        entry2
    liveins:     [ '%rdi' ]
    instructions:
# CHECK: INC32m killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (store 4 into %ir."a value"), (load 4 from %ir."a value")
      - 'INC32m killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (store 4 into %ir."a value"), (load 4 from %ir."a value")'
      - RETQ
...
---
name:            volatile_inc
tracksRegLiveness: true
liveins:
  - { reg: '%rdi' }
body:
  - id:          0
    name:        entry
    liveins:     [ '%rdi' ]
    instructions:
    # CHECK: name: volatile_inc
    # CHECK: %eax = MOV32rm %rdi, 1, _, 0, _ :: (volatile load 4 from %ir.x)
    # CHECK: MOV32mr killed %rdi, 1, _, 0, _, %eax :: (volatile store 4 into %ir.x)
      - '%eax = MOV32rm %rdi, 1, _, 0, _ :: (volatile load 4 from %ir.x)'
      - '%eax = INC32r killed %eax, implicit-def dead %eflags'
      - 'MOV32mr killed %rdi, 1, _, 0, _, %eax :: (volatile store 4 into %ir.x)'
      - 'RETQ %eax'
...
---
name:            non_temporal_store
tracksRegLiveness: true
liveins:
  - { reg: '%rdi' }
  - { reg: '%esi' }
body:
  - id:          0
    name:        entry
    liveins:     [ '%esi', '%rdi' ]
    instructions:
# CHECK: name: non_temporal_store
# CHECK: MOVNTImr killed %rdi, 1, _, 0, _, killed %esi :: (non-temporal store 4 into %ir.a)
      - 'MOVNTImr killed %rdi, 1, _, 0, _, killed %esi :: (non-temporal store 4 into %ir.a)'
      - RETQ
...
---
name:            invariant_load
tracksRegLiveness: true
liveins:
  - { reg: '%rdi' }
body:
  - id:          0
    name:        entry
    liveins:     [ '%rdi' ]
    instructions:
# CHECK: name: invariant_load
# CHECK: %eax = MOV32rm killed %rdi, 1, _, 0, _ :: (invariant load 4 from %ir.x)
      - '%eax = MOV32rm killed %rdi, 1, _, 0, _ :: (invariant load 4 from %ir.x)'
      - 'RETQ %eax'
...
---
name:            memory_offset
tracksRegLiveness: true
liveins:
  - { reg: '%rdi' }
body:
  - id:          0
    name:        entry
    liveins:     [ '%rdi' ]
    instructions:
# CHECK: name: memory_offset
# CHECK:      %xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec)
# CHECK-NEXT: %xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16)
# CHECK:      MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec)
# CHECK-NEXT: MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16)
      - '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec)'
      - '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16)'
      - '%xmm2 = FsFLD0SS'
      - '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2'
      - 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec)'
      - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16)'
      - RETQ
...
---
name:            memory_alignment
tracksRegLiveness: true
liveins:
  - { reg: '%rdi' }
body:
  - id:          0
    name:        entry
    liveins:     [ '%rdi' ]
    instructions:
# CHECK: name: memory_alignment
# CHECK:      %xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align 32)
# CHECK-NEXT: %xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)
# CHECK:      MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)
# CHECK-NEXT: MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)
      - '%xmm0 = MOVAPSrm %rdi, 1, _, 0, _ :: (load 16 from %ir.vec, align 32)'
      - '%xmm1 = MOVAPSrm %rdi, 1, _, 16, _ :: (load 16 from %ir.vec + 16, align 32)'
      - '%xmm2 = FsFLD0SS'
      - '%xmm1 = MOVSSrr killed %xmm1, killed %xmm2'
      - 'MOVAPSmr %rdi, 1, _, 0, _, killed %xmm0 :: (store 16 into %ir.vec, align 32)'
      - 'MOVAPSmr killed %rdi, 1, _, 16, _, killed %xmm1 :: (store 16 into %ir.vec + 16, align 32)'
      - RETQ
...