llvm-mirror/test/MC/ARM/nop-thumb-padding.s

@ RUN: llvm-mc -triple armv6-apple-darwin %s -filetype=obj -o %t.obj
@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump
@ RUN: FileCheck %s < %t.dump

.thumb_func x
.code 16
x:
      adds r0, r1, r2
      .align 4
      adds r0, r1, r2

@ CHECK: ('_section_data', '8818c046 c046c046 c046c046 c046c046 8818')
ARM .align NOP padding uses different encoding pre-ARMv6. Patch by Kristof Beyls and James Malloy. llvm-svn: 137723 2011-08-16 19:06:20 +02:00			`@ RUN: llvm-mc -triple armv6-apple-darwin %s -filetype=obj -o %t.obj`
			`@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump`
			`@ RUN: FileCheck %s < %t.dump`

			`.thumb_func x`
			`.code 16`
			`x:`
ARM thumb assembly parsing for arithmetic flag setting instructions. Thumb one requires that many arithmetic instruction forms have an 'S' suffix. For Thumb2, the whether the suffix is required or precluded depends on whether the instruction is in an IT block. Use target parser predicates to check for these sorts of context-sensitive constraints. llvm-svn: 137746 2011-08-16 22:45:50 +02:00			`adds r0, r1, r2`
ARM .align NOP padding uses different encoding pre-ARMv6. Patch by Kristof Beyls and James Malloy. llvm-svn: 137723 2011-08-16 19:06:20 +02:00			`.align 4`
ARM thumb assembly parsing for arithmetic flag setting instructions. Thumb one requires that many arithmetic instruction forms have an 'S' suffix. For Thumb2, the whether the suffix is required or precluded depends on whether the instruction is in an IT block. Use target parser predicates to check for these sorts of context-sensitive constraints. llvm-svn: 137746 2011-08-16 22:45:50 +02:00			`adds r0, r1, r2`
ARM .align NOP padding uses different encoding pre-ARMv6. Patch by Kristof Beyls and James Malloy. llvm-svn: 137723 2011-08-16 19:06:20 +02:00
			`@ CHECK: ('_section_data', '8818c046 c046c046 c046c046 c046c046 8818')`