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llvm-mirror/test/CodeGen/XCore/ashr.ll

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convert the last 3 targets to use EmitFunctionBody() now that it has before/end body hooks. lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp | 49 ++----------- lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp | 87 ++++++------------------ lib/Target/XCore/AsmPrinter/XCoreAsmPrinter.cpp | 56 +++------------ test/CodeGen/XCore/ashr.ll | 2 4 files changed, 48 insertions(+), 146 deletions(-) llvm-svn: 94741
2010-01-28 07:22:43 +01:00
; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
Add some peepholes for signed comparisons using ashr X, X, 32. llvm-svn: 83549
2009-10-08 17:38:17 +02:00
define i32 @ashr(i32 %a, i32 %b) {
%1 = ashr i32 %a, %b
ret i32 %1
}
; CHECK: ashr:
; CHECK-NEXT: ashr r0, r0, r1
define i32 @ashri1(i32 %a) {
%1 = ashr i32 %a, 24
ret i32 %1
}
; CHECK: ashri1:
; CHECK-NEXT: ashr r0, r0, 24
define i32 @ashri2(i32 %a) {
%1 = ashr i32 %a, 31
ret i32 %1
}
; CHECK: ashri2:
; CHECK-NEXT: ashr r0, r0, 32
define i32 @f1(i32 %a) {
%1 = icmp slt i32 %a, 0
br i1 %1, label %less, label %not_less
less:
ret i32 10
not_less:
ret i32 17
}
; CHECK: f1:
; CHECK-NEXT: ashr r0, r0, 32
Flip the new block-placement pass to be on by default. This is mostly to test the waters. I'd like to get results from FNT build bots and other bots running on non-x86 platforms. This feature has been pretty heavily tested over the last few months by me, and it fixes several of the execution time regressions caused by the inlining work by preventing inlining decisions from radically impacting block layout. I've seen very large improvements in yacr2 and ackermann benchmarks, along with the expected noise across all of the benchmark suite whenever code layout changes. I've analyzed all of the regressions and fixed them, or found them to be impossible to fix. See my email to llvmdev for more details. I'd like for this to be in 3.1 as it complements the inliner changes, but if any failures are showing up or anyone has concerns, it is just a flag flip and so can be easily turned off. I'm switching it on tonight to try and get at least one run through various folks' performance suites in case SPEC or something else has serious issues with it. I'll watch bots and revert if anything shows up. llvm-svn: 154816
2012-04-16 15:49:17 +02:00
; CHECK-NEXT: bt r0
Add some peepholes for signed comparisons using ashr X, X, 32. llvm-svn: 83549
2009-10-08 17:38:17 +02:00
define i32 @f2(i32 %a) {
%1 = icmp sge i32 %a, 0
br i1 %1, label %greater, label %not_greater
greater:
ret i32 10
not_greater:
ret i32 17
}
; CHECK: f2:
; CHECK-NEXT: ashr r0, r0, 32
; CHECK-NEXT: bt r0
define i32 @f3(i32 %a) {
%1 = icmp slt i32 %a, 0
%2 = select i1 %1, i32 10, i32 17
ret i32 %2
}
; CHECK: f3:
Enable machine sinking critical edge splitting. e.g. define double @foo(double %x, double %y, i1 %c) nounwind { %a = fdiv double %x, 3.2 %z = select i1 %c, double %a, double %y ret double %z } Was: _foo: divsd LCPI0_0(%rip), %xmm0 testb $1, %dil jne LBB0_2 movaps %xmm1, %xmm0 LBB0_2: ret Now: _foo: testb $1, %dil je LBB0_2 divsd LCPI0_0(%rip), %xmm0 ret LBB0_2: movaps %xmm1, %xmm0 ret This avoids the divsd when early exit is taken. rdar://8454886 llvm-svn: 114372
2010-09-21 00:52:00 +02:00
; CHECK-NEXT: ashr r0, r0, 32
Flip the new block-placement pass to be on by default. This is mostly to test the waters. I'd like to get results from FNT build bots and other bots running on non-x86 platforms. This feature has been pretty heavily tested over the last few months by me, and it fixes several of the execution time regressions caused by the inlining work by preventing inlining decisions from radically impacting block layout. I've seen very large improvements in yacr2 and ackermann benchmarks, along with the expected noise across all of the benchmark suite whenever code layout changes. I've analyzed all of the regressions and fixed them, or found them to be impossible to fix. See my email to llvmdev for more details. I'd like for this to be in 3.1 as it complements the inliner changes, but if any failures are showing up or anyone has concerns, it is just a flag flip and so can be easily turned off. I'm switching it on tonight to try and get at least one run through various folks' performance suites in case SPEC or something else has serious issues with it. I'll watch bots and revert if anything shows up. llvm-svn: 154816
2012-04-16 15:49:17 +02:00
; CHECK-NEXT: bt r0
; CHECK-NEXT: ldc r0, 17
; CHECK: ldc r0, 10
Add some peepholes for signed comparisons using ashr X, X, 32. llvm-svn: 83549
2009-10-08 17:38:17 +02:00
define i32 @f4(i32 %a) {
%1 = icmp sge i32 %a, 0
%2 = select i1 %1, i32 10, i32 17
ret i32 %2
}
; CHECK: f4:
Enable machine sinking critical edge splitting. e.g. define double @foo(double %x, double %y, i1 %c) nounwind { %a = fdiv double %x, 3.2 %z = select i1 %c, double %a, double %y ret double %z } Was: _foo: divsd LCPI0_0(%rip), %xmm0 testb $1, %dil jne LBB0_2 movaps %xmm1, %xmm0 LBB0_2: ret Now: _foo: testb $1, %dil je LBB0_2 divsd LCPI0_0(%rip), %xmm0 ret LBB0_2: movaps %xmm1, %xmm0 ret This avoids the divsd when early exit is taken. rdar://8454886 llvm-svn: 114372
2010-09-21 00:52:00 +02:00
; CHECK-NEXT: ashr r0, r0, 32
Flip the new block-placement pass to be on by default. This is mostly to test the waters. I'd like to get results from FNT build bots and other bots running on non-x86 platforms. This feature has been pretty heavily tested over the last few months by me, and it fixes several of the execution time regressions caused by the inlining work by preventing inlining decisions from radically impacting block layout. I've seen very large improvements in yacr2 and ackermann benchmarks, along with the expected noise across all of the benchmark suite whenever code layout changes. I've analyzed all of the regressions and fixed them, or found them to be impossible to fix. See my email to llvmdev for more details. I'd like for this to be in 3.1 as it complements the inliner changes, but if any failures are showing up or anyone has concerns, it is just a flag flip and so can be easily turned off. I'm switching it on tonight to try and get at least one run through various folks' performance suites in case SPEC or something else has serious issues with it. I'll watch bots and revert if anything shows up. llvm-svn: 154816
2012-04-16 15:49:17 +02:00
; CHECK-NEXT: bt r0
; CHECK-NEXT: ldc r0, 10
; CHECK: ldc r0, 17
Add some peepholes for signed comparisons using ashr X, X, 32. llvm-svn: 83549
2009-10-08 17:38:17 +02:00
define i32 @f5(i32 %a) {
%1 = icmp sge i32 %a, 0
%2 = zext i1 %1 to i32
ret i32 %2
}
; CHECK: f5:
; CHECK-NEXT: ashr r0, r0, 32
; CHECK-NEXT: eq r0, r0, 0
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