llvm-mirror/test/CodeGen/ARM/t2-imm.ll

; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s

define i32 @f6(i32 %a) {
; CHECK:f6
; CHECK: movw r0, #1123
; CHECK: movt r0, #1000
    %tmp = add i32 0, 65537123
    ret i32 %tmp
}
ARM: yet another round of ARM test clean ups llvm-svn: 205586 2014-04-04 01:47:24 +02:00			`; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - \| FileCheck %s`
Use movt/movw pair to materialize 32 bit constants on ARMv6T2+. This should be better than single load from constpool. llvm-svn: 82948 2009-09-28 01:52:58 +02:00
			`define i32 @f6(i32 %a) {`
			`; CHECK:f6`
Fix borken test llvm-svn: 112555 2010-08-31 01:41:49 +02:00			`; CHECK: movw r0, #1123`
			`; CHECK: movt r0, #1000`
Use movt/movw pair to materialize 32 bit constants on ARMv6T2+. This should be better than single load from constpool. llvm-svn: 82948 2009-09-28 01:52:58 +02:00			`%tmp = add i32 0, 65537123`
			`ret i32 %tmp`
			`}`