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llvm-mirror/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll

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Fix PR5391: support early clobber physical register def tied with a use (ewwww) - A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber. - If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range. - Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature". llvm-svn: 90269
2009-12-01 23:25:00 +01:00
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; pr5391
define void @t() nounwind ssp {
entry:
; CHECK: t:
; CHECK: movl %ecx, %eax
; CHECK: %eax = foo (%eax, %ecx)
%b = alloca i32 ; <i32*> [#uses=2]
%a = alloca i32 ; <i32*> [#uses=1]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
%0 = load i32* %b, align 4 ; <i32> [#uses=1]
%1 = load i32* %b, align 4 ; <i32> [#uses=1]
%asmtmp = call i32 asm "$0 = foo ($1, $2)", "=&{ax},%0,r,~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1) nounwind ; <i32> [#uses=1]
store i32 %asmtmp, i32* %a
br label %return
return: ; preds = %entry
ret void
}
define void @t2() nounwind ssp {
entry:
; CHECK: t2:
Be more aggressive about following hints. RAGreedy::tryAssign will now evict interference from the preferred register even when another register is free. To support this, add the EvictionCost struct that counts how many hints are broken by an eviction. We don't want to break one hint just to satisfy another. Rename canEvict to shouldEvict, and add the first bit of eviction policy that doesn't depend on spill weights: Always make room in the preferred register as long as the evictees can be split and aren't already assigned to their preferred register. Also make the CSR avoidance more accurate. When looking for a cheaper register it is OK to use a new volatile register. Only CSR aliases that have never been used before should be avoided. llvm-svn: 134735
2011-07-08 22:46:18 +02:00
; CHECK: movl
; CHECK: [[D2:%e.x]] = foo
; CHECK: ([[D2]],
; CHECK-NOT: [[D2]]
; CHECK: )
Fix PR5391: support early clobber physical register def tied with a use (ewwww) - A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber. - If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range. - Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature". llvm-svn: 90269
2009-12-01 23:25:00 +01:00
%b = alloca i32 ; <i32*> [#uses=2]
%a = alloca i32 ; <i32*> [#uses=1]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
%0 = load i32* %b, align 4 ; <i32> [#uses=1]
%1 = load i32* %b, align 4 ; <i32> [#uses=1]
%asmtmp = call i32 asm "$0 = foo ($1, $2)", "=&r,%0,r,~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1) nounwind ; <i32> [#uses=1]
store i32 %asmtmp, i32* %a
br label %return
return: ; preds = %entry
ret void
}
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