2016-09-15 22:39:01 +02:00
|
|
|
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
2014-07-22 21:19:36 +02:00
|
|
|
; RUN: opt < %s -instcombine -S | FileCheck %s
|
|
|
|
|
|
|
|
target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32:32-p3:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
|
|
|
|
|
|
|
|
define i1 @lshr_eq_msb_low_last_zero(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @lshr_eq_msb_low_last_zero(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 %a, 6
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr i8 127, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 0
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
2016-09-15 23:35:30 +02:00
|
|
|
define <2 x i1> @lshr_eq_msb_low_last_zero_vec(<2 x i8> %a) {
|
|
|
|
; CHECK-LABEL: @lshr_eq_msb_low_last_zero_vec(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> %a, <i8 6, i8 6>
|
|
|
|
; CHECK-NEXT: ret <2 x i1> [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr <2 x i8> <i8 127, i8 127>, %a
|
|
|
|
%cmp = icmp eq <2 x i8> %shr, zeroinitializer
|
|
|
|
ret <2 x i1> %cmp
|
|
|
|
}
|
|
|
|
|
2014-07-22 21:19:36 +02:00
|
|
|
define i1 @ashr_eq_msb_low_second_zero(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @ashr_eq_msb_low_second_zero(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 %a, 6
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr i8 127, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 0
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @lshr_ne_msb_low_last_zero(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @lshr_ne_msb_low_last_zero(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 %a, 7
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr i8 127, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 0
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @ashr_ne_msb_low_second_zero(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @ashr_ne_msb_low_second_zero(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 %a, 7
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr i8 127, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 0
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @ashr_eq_both_equal(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @ashr_eq_both_equal(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 0
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr i8 128, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 128
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @ashr_ne_both_equal(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @ashr_ne_both_equal(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 0
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr i8 128, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 128
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @lshr_eq_both_equal(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @lshr_eq_both_equal(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 0
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr i8 127, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 127
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @lshr_ne_both_equal(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @lshr_ne_both_equal(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 0
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr i8 127, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 127
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_ashr_eq_both_equal(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_ashr_eq_both_equal(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 0
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr exact i8 128, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 128
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_ashr_ne_both_equal(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_ashr_ne_both_equal(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 0
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr exact i8 128, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 128
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_lshr_eq_both_equal(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_lshr_eq_both_equal(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 0
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr exact i8 126, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 126
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_lshr_ne_both_equal(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_lshr_ne_both_equal(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 0
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr exact i8 126, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 126
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_lshr_eq_opposite_msb(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_lshr_eq_opposite_msb(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 7
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr exact i8 -128, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @lshr_eq_opposite_msb(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @lshr_eq_opposite_msb(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 7
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr i8 -128, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_lshr_ne_opposite_msb(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_lshr_ne_opposite_msb(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 7
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr exact i8 -128, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @lshr_ne_opposite_msb(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @lshr_ne_opposite_msb(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 7
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr i8 -128, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_ashr_eq(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_ashr_eq(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 7
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr exact i8 -128, %a
|
|
|
|
%cmp = icmp eq i8 %shr, -1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_ashr_ne(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_ashr_ne(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 7
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr exact i8 -128, %a
|
|
|
|
%cmp = icmp ne i8 %shr, -1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_lshr_eq(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_lshr_eq(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 2
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr exact i8 4, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_lshr_ne(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_lshr_ne(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 2
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr exact i8 4, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_ashr_eq(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_ashr_eq(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 7
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr i8 -128, %a
|
|
|
|
%cmp = icmp eq i8 %shr, -1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_ashr_ne(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_ashr_ne(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 7
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr i8 -128, %a
|
|
|
|
%cmp = icmp ne i8 %shr, -1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_lshr_eq(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_lshr_eq(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 2
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr i8 4, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_lshr_ne(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_lshr_ne(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 2
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr i8 4, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 1
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_lshr_eq_exactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_lshr_eq_exactdiv(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 4
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr exact i8 80, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 5
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_lshr_ne_exactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_lshr_ne_exactdiv(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 4
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr exact i8 80, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 5
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_lshr_eq_exactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_lshr_eq_exactdiv(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 4
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr i8 80, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 5
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_lshr_ne_exactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_lshr_ne_exactdiv(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 4
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = lshr i8 80, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 5
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_ashr_eq_exactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_ashr_eq_exactdiv(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 4
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr exact i8 -80, %a
|
|
|
|
%cmp = icmp eq i8 %shr, -5
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_ashr_ne_exactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_ashr_ne_exactdiv(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 4
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr exact i8 -80, %a
|
|
|
|
%cmp = icmp ne i8 %shr, -5
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_ashr_eq_exactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_ashr_eq_exactdiv(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %a, 4
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr i8 -80, %a
|
|
|
|
%cmp = icmp eq i8 %shr, -5
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_ashr_ne_exactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_ashr_ne_exactdiv(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %a, 4
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
|
|
|
%shr = ashr i8 -80, %a
|
|
|
|
%cmp = icmp ne i8 %shr, -5
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_lshr_eq_noexactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_lshr_eq_noexactdiv(
|
|
|
|
; CHECK-NEXT: ret i1 false
|
|
|
|
;
|
|
|
|
%shr = lshr exact i8 80, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 31
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_lshr_ne_noexactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_lshr_ne_noexactdiv(
|
|
|
|
; CHECK-NEXT: ret i1 true
|
|
|
|
;
|
|
|
|
%shr = lshr exact i8 80, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 31
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_lshr_eq_noexactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_lshr_eq_noexactdiv(
|
|
|
|
; CHECK-NEXT: ret i1 false
|
|
|
|
;
|
|
|
|
%shr = lshr i8 80, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 31
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_lshr_ne_noexactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_lshr_ne_noexactdiv(
|
|
|
|
; CHECK-NEXT: ret i1 true
|
|
|
|
;
|
|
|
|
%shr = lshr i8 80, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 31
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_ashr_eq_noexactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_ashr_eq_noexactdiv(
|
|
|
|
; CHECK-NEXT: ret i1 false
|
|
|
|
;
|
|
|
|
%shr = ashr exact i8 -80, %a
|
|
|
|
%cmp = icmp eq i8 %shr, -31
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @exact_ashr_ne_noexactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @exact_ashr_ne_noexactdiv(
|
|
|
|
; CHECK-NEXT: ret i1 true
|
|
|
|
;
|
|
|
|
%shr = ashr exact i8 -80, %a
|
|
|
|
%cmp = icmp ne i8 %shr, -31
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_ashr_eq_noexactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_ashr_eq_noexactdiv(
|
|
|
|
; CHECK-NEXT: ret i1 false
|
|
|
|
;
|
|
|
|
%shr = ashr i8 -80, %a
|
|
|
|
%cmp = icmp eq i8 %shr, -31
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_ashr_ne_noexactdiv(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_ashr_ne_noexactdiv(
|
|
|
|
; CHECK-NEXT: ret i1 true
|
|
|
|
;
|
|
|
|
%shr = ashr i8 -80, %a
|
|
|
|
%cmp = icmp ne i8 %shr, -31
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_lshr_eq_noexactlog(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_lshr_eq_noexactlog(
|
|
|
|
; CHECK-NEXT: ret i1 false
|
|
|
|
;
|
|
|
|
%shr = lshr i8 90, %a
|
|
|
|
%cmp = icmp eq i8 %shr, 30
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_lshr_ne_noexactlog(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_lshr_ne_noexactlog(
|
|
|
|
; CHECK-NEXT: ret i1 true
|
|
|
|
;
|
|
|
|
%shr = lshr i8 90, %a
|
|
|
|
%cmp = icmp ne i8 %shr, 30
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_ashr_eq_noexactlog(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_ashr_eq_noexactlog(
|
|
|
|
; CHECK-NEXT: ret i1 false
|
|
|
|
;
|
|
|
|
%shr = ashr i8 -90, %a
|
|
|
|
%cmp = icmp eq i8 %shr, -30
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
define i1 @nonexact_ashr_ne_noexactlog(i8 %a) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @nonexact_ashr_ne_noexactlog(
|
|
|
|
; CHECK-NEXT: ret i1 true
|
|
|
|
;
|
|
|
|
%shr = ashr i8 -90, %a
|
|
|
|
%cmp = icmp ne i8 %shr, -30
|
|
|
|
ret i1 %cmp
|
2014-07-22 21:19:36 +02:00
|
|
|
}
|
2014-09-17 13:32:31 +02:00
|
|
|
|
|
|
|
; Don't try to fold the entire body of function @PR20945 into a
|
|
|
|
; single `ret i1 true` statement.
|
|
|
|
; If %B is equal to 1, then this function would return false.
|
|
|
|
; As a consequence, the instruction combiner is not allowed to fold %cmp
|
|
|
|
; to 'true'. Instead, it should replace %cmp with a simpler comparison
|
|
|
|
; between %B and 1.
|
|
|
|
|
|
|
|
define i1 @PR20945(i32 %B) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @PR20945(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %B, 1
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
2014-09-17 13:32:31 +02:00
|
|
|
%shr = ashr i32 -9, %B
|
|
|
|
%cmp = icmp ne i32 %shr, -5
|
|
|
|
ret i1 %cmp
|
|
|
|
}
|
2014-10-09 14:41:49 +02:00
|
|
|
|
|
|
|
define i1 @PR21222(i32 %B) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @PR21222(
|
|
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %B, 6
|
|
|
|
; CHECK-NEXT: ret i1 [[CMP]]
|
|
|
|
;
|
2014-10-09 14:41:49 +02:00
|
|
|
%shr = ashr i32 -93, %B
|
|
|
|
%cmp = icmp eq i32 %shr, -2
|
|
|
|
ret i1 %cmp
|
|
|
|
}
|
2015-09-19 02:48:31 +02:00
|
|
|
|
|
|
|
define i1 @PR24873(i64 %V) {
|
2016-09-15 22:39:01 +02:00
|
|
|
; CHECK-LABEL: @PR24873(
|
|
|
|
; CHECK-NEXT: [[ICMP:%.*]] = icmp ugt i64 %V, 61
|
|
|
|
; CHECK-NEXT: ret i1 [[ICMP]]
|
|
|
|
;
|
2015-09-19 02:48:31 +02:00
|
|
|
%ashr = ashr i64 -4611686018427387904, %V
|
|
|
|
%icmp = icmp eq i64 %ashr, -1
|
|
|
|
ret i1 %icmp
|
|
|
|
}
|
2016-09-15 22:39:01 +02:00
|
|
|
|