llvm-mirror/test/CodeGen/ARM/ssat-lower.ll

; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 | FileCheck %s
; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 | FileCheck %s

; immediate argument < lower-bound
; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat
define i32 @ssat1() nounwind {
  %tmp = call i32 @llvm.arm.ssat(i32 128, i32 0)
  ret i32 %tmp
}

declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone
Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" This reverts commit 80a34ae31125aa46dcad47162ba45b152aed968d with fixes. Previously, since bots turning on EXPENSIVE_CHECKS are essentially turning on MachineVerifierPass by default on X86 and the fact that inline-asm-avx-v-constraint-32bit.ll and inline-asm-avx512vl-v-constraint-32bit.ll are not expected to generate functioning machine code, this would go down to `report_fatal_error` in MachineVerifierPass. Here passing `-verify-machineinstrs=0` to make the intent explicit. 2020-02-11 23:01:35 -08:00			`; RUN: not --crash llc < %s -O1 -mtriple=armv6-none-none-eabi 2>&1 \| FileCheck %s`
			`; RUN: not --crash llc < %s -O1 -mtriple=thumbv7-none-none-eabi 2>&1 \| FileCheck %s`
Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions The mapping of these two intrinsics in ARMInstrInfo.td had a small omission which lead to their operands not being validated/transformed before being lowered into usat and ssat instructions. This can cause incorrect instructions to be emitted. I've also added tests for the remaining two saturating arithmatic intrinsics @llvm.arm.qadd and @llvm.arm.qsub as they are missing codegen tests. llvm-svn: 250697 2015-10-19 11:44:24 +00:00
			`; immediate argument < lower-bound`
			`; CHECK: LLVM ERROR: Cannot select: intrinsic %llvm.arm.ssat`
			`define i32 @ssat1() nounwind {`
			`%tmp = call i32 @llvm.arm.ssat(i32 128, i32 0)`
			`ret i32 %tmp`
			`}`

			`declare i32 @llvm.arm.ssat(i32, i32) nounwind readnone`