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llvm-mirror/test/CodeGen/PowerPC/constants-i64.ll

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[NFC][PowerPC] Add testcase of constant-i64.
2020-11-17 04:49:19 +00:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
Adding -verify-machineinstrs option to PowerPC tests Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. llvm-svn: 277624
2016-08-03 18:17:35 +00:00
; RUN: llc -verify-machineinstrs -mcpu=ppc64 < %s | FileCheck %s
[PowerPC] Materialize i64 constants using bit inversion Materializing full 64-bit constants on PPC64 can be expensive, requiring up to 5 instructions depending on the locations of the non-zero bits. Sometimes materializing the bit-reversed constant, and then flipping the bits, requires fewer instructions than the direct method. If so, do that instead. llvm-svn: 225132
2015-01-04 12:35:03 +00:00
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
; Function Attrs: nounwind readnone
define i64 @cn1() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
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; CHECK-LABEL: cn1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, -1
; CHECK-NEXT: rldicr 3, 3, 48, 63
; CHECK-NEXT: blr
[PowerPC] Materialize i64 constants using bit inversion Materializing full 64-bit constants on PPC64 can be expensive, requiring up to 5 instructions depending on the locations of the non-zero bits. Sometimes materializing the bit-reversed constant, and then flipping the bits, requires fewer instructions than the direct method. If so, do that instead. llvm-svn: 225132
2015-01-04 12:35:03 +00:00
entry:
ret i64 281474976710655
}
[PowerPC] Materialize i64 constants using rotation Materializing full 64-bit constants on PPC64 can be expensive, requiring up to 5 instructions depending on the locations of the non-zero bits. Sometimes materializing a rotated constant, and then applying the inverse rotation, requires fewer instructions than the direct method. If so, do that instead. In r225132, I added support for forming constants using bit inversion. In effect, this reverts that commit and replaces it with rotation support. The bit inversion is useful for turning constants that are mostly ones into ones that are mostly zeros (thus enabling a more-efficient shift-based materialization), but the same effect can be obtained by using negative constants and a rotate, and that is at least as efficient, if not more. llvm-svn: 225135
2015-01-04 15:43:55 +00:00
; Function Attrs: nounwind readnone
define i64 @cnb() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
2020-11-17 04:49:19 +00:00
; CHECK-LABEL: cnb:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, -81
; CHECK-NEXT: rldicr 3, 3, 48, 63
; CHECK-NEXT: blr
[PowerPC] Materialize i64 constants using rotation Materializing full 64-bit constants on PPC64 can be expensive, requiring up to 5 instructions depending on the locations of the non-zero bits. Sometimes materializing a rotated constant, and then applying the inverse rotation, requires fewer instructions than the direct method. If so, do that instead. In r225132, I added support for forming constants using bit inversion. In effect, this reverts that commit and replaces it with rotation support. The bit inversion is useful for turning constants that are mostly ones into ones that are mostly zeros (thus enabling a more-efficient shift-based materialization), but the same effect can be obtained by using negative constants and a rotate, and that is at least as efficient, if not more. llvm-svn: 225135
2015-01-04 15:43:55 +00:00
entry:
ret i64 281474976710575
[PowerPC] Materialize i64 constants using rotation with masking r225135 added the ability to materialize i64 constants using rotations in order to reduce the instruction count. Sometimes we can use a rotation only with some extra masking, so that we take advantage of the fact that generating a bunch of extra higher-order 1 bits is easy using li/lis. llvm-svn: 225147
2015-01-05 03:41:38 +00:00
}
; Function Attrs: nounwind readnone
define i64 @f2(i64 %x) #0 {
[NFC][PowerPC] Add testcase of constant-i64.
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; CHECK-LABEL: f2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, -1
; CHECK-NEXT: sldi 3, 3, 36
; CHECK-NEXT: blr
[PowerPC] Materialize i64 constants using rotation with masking r225135 added the ability to materialize i64 constants using rotations in order to reduce the instruction count. Sometimes we can use a rotation only with some extra masking, so that we take advantage of the fact that generating a bunch of extra higher-order 1 bits is easy using li/lis. llvm-svn: 225147
2015-01-05 03:41:38 +00:00
entry:
ret i64 -68719476736
}
; Function Attrs: nounwind readnone
define i64 @f2a(i64 %x) #0 {
[NFC][PowerPC] Add testcase of constant-i64.
2020-11-17 04:49:19 +00:00
; CHECK-LABEL: f2a:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, -337
; CHECK-NEXT: sldi 3, 3, 30
; CHECK-NEXT: blr
[PowerPC] Materialize i64 constants using rotation with masking r225135 added the ability to materialize i64 constants using rotations in order to reduce the instruction count. Sometimes we can use a rotation only with some extra masking, so that we take advantage of the fact that generating a bunch of extra higher-order 1 bits is easy using li/lis. llvm-svn: 225147
2015-01-05 03:41:38 +00:00
entry:
ret i64 -361850994688
[PowerPC] Materialize i64 constants using rotation Materializing full 64-bit constants on PPC64 can be expensive, requiring up to 5 instructions depending on the locations of the non-zero bits. Sometimes materializing a rotated constant, and then applying the inverse rotation, requires fewer instructions than the direct method. If so, do that instead. In r225132, I added support for forming constants using bit inversion. In effect, this reverts that commit and replaces it with rotation support. The bit inversion is useful for turning constants that are mostly ones into ones that are mostly zeros (thus enabling a more-efficient shift-based materialization), but the same effect can be obtained by using negative constants and a rotate, and that is at least as efficient, if not more. llvm-svn: 225135
2015-01-04 15:43:55 +00:00
}
; Function Attrs: nounwind readnone
define i64 @f2n(i64 %x) #0 {
[NFC][PowerPC] Add testcase of constant-i64.
2020-11-17 04:49:19 +00:00
; CHECK-LABEL: f2n:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, -4096
; CHECK-NEXT: rldicr 3, 3, 36, 63
; CHECK-NEXT: blr
[PowerPC] Materialize i64 constants using rotation Materializing full 64-bit constants on PPC64 can be expensive, requiring up to 5 instructions depending on the locations of the non-zero bits. Sometimes materializing a rotated constant, and then applying the inverse rotation, requires fewer instructions than the direct method. If so, do that instead. In r225132, I added support for forming constants using bit inversion. In effect, this reverts that commit and replaces it with rotation support. The bit inversion is useful for turning constants that are mostly ones into ones that are mostly zeros (thus enabling a more-efficient shift-based materialization), but the same effect can be obtained by using negative constants and a rotate, and that is at least as efficient, if not more. llvm-svn: 225135
2015-01-04 15:43:55 +00:00
entry:
ret i64 68719476735
}
; Function Attrs: nounwind readnone
define i64 @f3(i64 %x) #0 {
[NFC][PowerPC] Add testcase of constant-i64.
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; CHECK-LABEL: f3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, -32768
; CHECK-NEXT: rldicr 3, 3, 33, 63
; CHECK-NEXT: blr
[PowerPC] Materialize i64 constants using rotation Materializing full 64-bit constants on PPC64 can be expensive, requiring up to 5 instructions depending on the locations of the non-zero bits. Sometimes materializing a rotated constant, and then applying the inverse rotation, requires fewer instructions than the direct method. If so, do that instead. In r225132, I added support for forming constants using bit inversion. In effect, this reverts that commit and replaces it with rotation support. The bit inversion is useful for turning constants that are mostly ones into ones that are mostly zeros (thus enabling a more-efficient shift-based materialization), but the same effect can be obtained by using negative constants and a rotate, and that is at least as efficient, if not more. llvm-svn: 225135
2015-01-04 15:43:55 +00:00
entry:
ret i64 8589934591
}
; Function Attrs: nounwind readnone
define i64 @cn2n() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
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; CHECK-LABEL: cn2n:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, -5121
; CHECK-NEXT: ori 3, 3, 65534
; CHECK-NEXT: rldicr 3, 3, 22, 63
; CHECK-NEXT: blr
[PowerPC] Materialize i64 constants using rotation Materializing full 64-bit constants on PPC64 can be expensive, requiring up to 5 instructions depending on the locations of the non-zero bits. Sometimes materializing a rotated constant, and then applying the inverse rotation, requires fewer instructions than the direct method. If so, do that instead. In r225132, I added support for forming constants using bit inversion. In effect, this reverts that commit and replaces it with rotation support. The bit inversion is useful for turning constants that are mostly ones into ones that are mostly zeros (thus enabling a more-efficient shift-based materialization), but the same effect can be obtained by using negative constants and a rotate, and that is at least as efficient, if not more. llvm-svn: 225135
2015-01-04 15:43:55 +00:00
entry:
ret i64 -1407374887747585
}
[NFC][PowerPC] Add tests of constants-i64.
2020-09-11 07:16:58 +00:00
define i64 @uint32_1() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
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; CHECK-LABEL: uint32_1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, 232
; CHECK-NEXT: ori 3, 3, 30023
; CHECK-NEXT: sldi 3, 3, 8
; CHECK-NEXT: blr
[NFC][PowerPC] Add tests in constants-i64.ll.
2020-09-07 13:14:00 +00:00
entry:
ret i64 3900000000
}
[PowerPC] Materialize i64 constants using bit inversion Materializing full 64-bit constants on PPC64 can be expensive, requiring up to 5 instructions depending on the locations of the non-zero bits. Sometimes materializing the bit-reversed constant, and then flipping the bits, requires fewer instructions than the direct method. If so, do that instead. llvm-svn: 225132
2015-01-04 12:35:03 +00:00
[NFC][PowerPC] Add tests of constants-i64.
2020-09-11 07:16:58 +00:00
define i32 @uint32_1_i32() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
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; CHECK-LABEL: uint32_1_i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, 232
; CHECK-NEXT: ori 3, 3, 30023
; CHECK-NEXT: sldi 3, 3, 8
; CHECK-NEXT: blr
[NFC][PowerPC] Add tests in constants-i64.ll.
2020-09-07 13:14:00 +00:00
entry:
ret i32 -394967296
}
[NFC][PowerPC] Add tests of constants-i64.
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define i64 @uint32_2() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
2020-11-17 04:49:19 +00:00
; CHECK-LABEL: uint32_2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: oris 3, 3, 65535
; CHECK-NEXT: ori 3, 3, 65535
; CHECK-NEXT: blr
[NFC][PowerPC] Add tests in constants-i64.ll.
2020-09-07 13:14:00 +00:00
entry:
ret i64 4294967295
}
[NFC][PowerPC] Add tests of constants-i64.
2020-09-11 07:16:58 +00:00
define i32 @uint32_2_i32() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
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; CHECK-LABEL: uint32_2_i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: oris 3, 3, 65535
; CHECK-NEXT: ori 3, 3, 65535
; CHECK-NEXT: blr
[NFC][PowerPC] Add tests in constants-i64.ll.
2020-09-07 13:14:00 +00:00
entry:
ret i32 -1
[NFC][PowerPC] Add tests of constants-i64.
2020-09-11 07:16:58 +00:00
}
define i64 @uint32_3() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
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; CHECK-LABEL: uint32_3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 1
; CHECK-NEXT: sldi 3, 3, 31
; CHECK-NEXT: blr
[NFC][PowerPC] Add tests of constants-i64.
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entry:
ret i64 2147483648
}
define i64 @uint32_4() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
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; CHECK-LABEL: uint32_4:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 29
; CHECK-NEXT: sldi 3, 3, 32
; CHECK-NEXT: oris 3, 3, 3752
; CHECK-NEXT: ori 3, 3, 57376
; CHECK-NEXT: blr
[NFC][PowerPC] Add tests of constants-i64.
2020-09-11 07:16:58 +00:00
entry:
ret i64 124800000032
}
define i64 @cn_ones_1() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
2020-11-17 04:49:19 +00:00
; CHECK-LABEL: cn_ones_1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 2
; CHECK-NEXT: sldi 3, 3, 32
; CHECK-NEXT: oris 3, 3, 28543
; CHECK-NEXT: ori 3, 3, 65535
; CHECK-NEXT: blr
[NFC][PowerPC] Add tests of constants-i64.
2020-09-11 07:16:58 +00:00
entry:
ret i64 10460594175
}
define i64 @cn_ones_2() #0 {
[NFC][PowerPC] Add testcase of constant-i64.
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; CHECK-LABEL: cn_ones_2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 2
; CHECK-NEXT: sldi 3, 3, 32
; CHECK-NEXT: oris 3, 3, 28521
; CHECK-NEXT: ori 3, 3, 32767
; CHECK-NEXT: blr
[NFC][PowerPC] Add tests of constants-i64.
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entry:
ret i64 10459119615
[NFC][PowerPC] Add tests in constants-i64.ll.
2020-09-07 13:14:00 +00:00
}
[NFC][POwerPC] Added testcases of constant-i64.
2020-11-18 10:13:16 +00:00
define i64 @imm1() #0 {
; CHECK-LABEL: imm1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 8465
; CHECK-NEXT: sldi 3, 3, 28
; CHECK-NEXT: blr
entry:
ret i64 2272306135040 ;0x21110000000
}
define i64 @imm2() #0 {
; CHECK-LABEL: imm2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: oris 3, 3, 65535
; CHECK-NEXT: ori 3, 3, 8465
; CHECK-NEXT: blr
entry:
ret i64 4294910225 ;0xFFFF2111
}
define i64 @imm3() #0 {
; CHECK-LABEL: imm3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: oris 3, 3, 65535
; CHECK-NEXT: ori 3, 3, 33041
; CHECK-NEXT: blr
entry:
ret i64 4294934801 ;0xFFFF8111
}
define i64 @imm4() #0 {
; CHECK-LABEL: imm4:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, 33
; CHECK-NEXT: ori 3, 3, 4352
; CHECK-NEXT: rldimi 3, 3, 32, 0
; CHECK-NEXT: blr
entry:
ret i64 9307365931290880 ;0x21110000211100
}
define i64 @imm5() #0 {
; CHECK-LABEL: imm5:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 28685
; CHECK-NEXT: rldicr 3, 3, 52, 63
; CHECK-NEXT: blr
entry:
ret i64 58546795155816455 ;0xd0000000000007
}
define i64 @imm6() #0 {
; CHECK-LABEL: imm6:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, -1
; CHECK-NEXT: ori 3, 3, 28674
; CHECK-NEXT: rldicr 3, 3, 52, 63
; CHECK-NEXT: blr
entry:
ret i64 13510798882111479 ;0x2ffffffffffff7
}
define i64 @imm7() #0 {
; CHECK-LABEL: imm7:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: ori 3, 3, 61713
; CHECK-NEXT: sldi 3, 3, 28
; CHECK-NEXT: blr
entry:
ret i64 16565957296128 ;0xf1110000000
}
define i64 @imm8() #0 {
; CHECK-LABEL: imm8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, 15
; CHECK-NEXT: ori 3, 3, 57617
; CHECK-NEXT: sldi 3, 3, 22
; CHECK-NEXT: blr
entry:
ret i64 4364831817728 ;0x3f844400000
}
define i64 @imm9() #0 {
; CHECK-LABEL: imm9:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, -1
; CHECK-NEXT: ori 3, 3, 28674
; CHECK-NEXT: rldicr 3, 3, 52, 63
; CHECK-NEXT: blr
entry:
ret i64 13510798882111479 ;0x2ffffffffffff7
}
define i64 @imm10() #0 {
; CHECK-LABEL: imm10:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: ori 3, 3, 61713
; CHECK-NEXT: sldi 3, 3, 28
; CHECK-NEXT: blr
entry:
ret i64 16565957296128 ;0xf1110000000
}
define i64 @imm11() #0 {
; CHECK-LABEL: imm11:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, 15
; CHECK-NEXT: ori 3, 3, 57617
; CHECK-NEXT: sldi 3, 3, 22
; CHECK-NEXT: blr
entry:
ret i64 4364831817728 ;0x3f844400000
}
define i64 @imm12() #0 {
; CHECK-LABEL: imm12:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 4094
; CHECK-NEXT: sldi 3, 3, 32
; CHECK-NEXT: oris 3, 3, 16324
; CHECK-NEXT: ori 3, 3, 4096
; CHECK-NEXT: blr
entry:
ret i64 17584665923584 ;0xffe3fc41000
}
define i64 @imm13() #0 {
; CHECK-LABEL: imm13:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 19
; CHECK-NEXT: sldi 3, 3, 32
; CHECK-NEXT: oris 3, 3, 56895
; CHECK-NEXT: ori 3, 3, 65535
; CHECK-NEXT: blr
entry:
ret i64 85333114879 ;0x13de3fffff
}
define i64 @imm13_2() #0 {
; CHECK-LABEL: imm13_2:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 51
; CHECK-NEXT: sldi 3, 3, 32
; CHECK-NEXT: oris 3, 3, 56895
; CHECK-NEXT: ori 3, 3, 65535
; CHECK-NEXT: blr
entry:
ret i64 222772068351 ;0x33de3fffff
}
define i64 @imm14() #0 {
; CHECK-LABEL: imm14:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 254
; CHECK-NEXT: sldi 3, 3, 32
; CHECK-NEXT: oris 3, 3, 4383
; CHECK-NEXT: ori 3, 3, 65535
; CHECK-NEXT: blr
entry:
ret i64 1091209003007 ;0xfe111fffff
}
define i64 @imm15() #0 {
; CHECK-LABEL: imm15:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, -8065
; CHECK-NEXT: sldi 3, 3, 24
; CHECK-NEXT: blr
entry:
ret i64 -135308247040
}
define i64 @imm16() #0 {
; CHECK-LABEL: imm16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, -16392
; CHECK-NEXT: sldi 3, 3, 32
; CHECK-NEXT: oris 3, 3, 57217
; CHECK-NEXT: blr
entry:
ret i64 -70399354142720
}
define i64 @imm17() #0 {
; CHECK-LABEL: imm17:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, 158
; CHECK-NEXT: sldi 3, 3, 32
; CHECK-NEXT: ori 3, 3, 40689
; CHECK-NEXT: blr
entry:
ret i64 44473046320324337 ;0x9e000000009ef1
}
define i64 @imm18() #0 {
; CHECK-LABEL: imm18:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 3, 2
; CHECK-NEXT: sldi 3, 3, 32
; CHECK-NEXT: oris 3, 3, 39436
; CHECK-NEXT: ori 3, 3, 61633
; CHECK-NEXT: blr
entry:
ret i64 11174473921
}
[NFC][PowerPC] Add tests in constants-i64.ll.
2020-09-07 13:14:00 +00:00
attributes #0 = { nounwind readnone }
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