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llvm-mirror/test/MC/Disassembler/ARM/invalid-VLD1DUPq8_UPD-arm.txt

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The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions (single element or n-element structure to all lanes). llvm-svn: 129550
2011-04-15 02:10:45 +02:00
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. llvm-svn: 137144
2011-08-09 22:55:18 +02:00
# XFAIL: *
The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions (single element or n-element structure to all lanes). llvm-svn: 129550
2011-04-15 02:10:45 +02:00
# Opcode=737 Name=VLD1DUPq8_UPD Format=ARM_FORMAT_NLdSt(30)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 1| 0: 1: 0: 0| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 1: 1| 1: 1: 0: 0| 0: 0: 1: 1| 1: 1: 0: 1|
# -------------------------------------------------------------------------------------------------
#
# 'a' == 1 and data_size == 8 is invalid
0x3d 0x3c 0xa0 0xf4
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