2012-10-19 01:22:48 +02:00
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//===- llvm/Transforms/TargetTransformInfo.h --------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass exposes codegen information to IR-level passes. Every
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// transformation that uses codegen information is broken into three parts:
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// 1. The IR-level analysis pass.
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// 2. The IR-level transformation interface which provides the needed
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// information.
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// 3. Codegen-level implementation which uses target-specific hooks.
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//
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// This file defines #2, which is the interface that IR-level transformations
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// use for querying the codegen.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TRANSFORMS_TARGET_TRANSFORM_INTERFACE
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#define LLVM_TRANSFORMS_TARGET_TRANSFORM_INTERFACE
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#include "llvm/AddressingMode.h"
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2013-01-02 12:36:10 +01:00
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/Type.h"
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2012-12-03 18:02:12 +01:00
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#include "llvm/Pass.h"
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2012-10-19 01:22:48 +02:00
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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class ScalarTargetTransformInfo;
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class VectorTargetTransformInfo;
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/// TargetTransformInfo - This pass provides access to the codegen
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/// interfaces that are needed for IR-level transformations.
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class TargetTransformInfo : public ImmutablePass {
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private:
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const ScalarTargetTransformInfo *STTI;
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const VectorTargetTransformInfo *VTTI;
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public:
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/// Default ctor.
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///
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/// @note This has to exist, because this is a pass, but it should never be
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/// used.
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TargetTransformInfo();
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2012-10-29 17:26:52 +01:00
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TargetTransformInfo(const ScalarTargetTransformInfo* S,
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const VectorTargetTransformInfo *V)
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: ImmutablePass(ID), STTI(S), VTTI(V) {
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initializeTargetTransformInfoPass(*PassRegistry::getPassRegistry());
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}
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2012-10-19 01:22:48 +02:00
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TargetTransformInfo(const TargetTransformInfo &T) :
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ImmutablePass(ID), STTI(T.STTI), VTTI(T.VTTI) { }
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2012-10-24 19:22:41 +02:00
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const ScalarTargetTransformInfo* getScalarTargetTransformInfo() const {
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return STTI;
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}
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const VectorTargetTransformInfo* getVectorTargetTransformInfo() const {
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return VTTI;
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}
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/// Pass identification, replacement for typeid.
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static char ID;
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};
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// ---------------------------------------------------------------------------//
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// The classes below are inherited and implemented by target-specific classes
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// in the codegen.
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// ---------------------------------------------------------------------------//
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/// ScalarTargetTransformInfo - This interface is used by IR-level passes
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/// that need target-dependent information for generic scalar transformations.
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/// LSR, and LowerInvoke use this interface.
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class ScalarTargetTransformInfo {
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public:
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2012-12-09 04:12:46 +01:00
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/// PopcntHwSupport - Hardware support for population count. Compared to the
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/// SW implementation, HW support is supposed to significantly boost the
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/// performance when the population is dense, and it may or not may degrade
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/// performance if the population is sparse. A HW support is considered as
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/// "Fast" if it can outperform, or is on a par with, SW implementaion when
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/// the population is sparse; otherwise, it is considered as "Slow".
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enum PopcntHwSupport {
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None,
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Fast,
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Slow
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};
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virtual ~ScalarTargetTransformInfo() {}
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/// isLegalAddImmediate - Return true if the specified immediate is legal
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/// add immediate, that is the target has add instructions which can add
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/// a register with the immediate without having to materialize the
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/// immediate into a register.
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virtual bool isLegalAddImmediate(int64_t) const {
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return false;
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}
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/// isLegalICmpImmediate - Return true if the specified immediate is legal
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/// icmp immediate, that is the target has icmp instructions which can compare
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/// a register against the immediate without having to materialize the
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/// immediate into a register.
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virtual bool isLegalICmpImmediate(int64_t) const {
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return false;
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}
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/// isLegalAddressingMode - Return true if the addressing mode represented by
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/// AM is legal for this target, for a load/store of the specified type.
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/// The type may be VoidTy, in which case only return true if the addressing
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/// mode is legal for a load/store of any legal type.
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/// TODO: Handle pre/postinc as well.
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virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const {
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return false;
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}
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/// isTruncateFree - Return true if it's free to truncate a value of
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/// type Ty1 to type Ty2. e.g. On x86 it's free to truncate a i32 value in
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/// register EAX to i16 by referencing its sub-register AX.
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virtual bool isTruncateFree(Type *Ty1, Type *Ty2) const {
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return false;
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}
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/// Is this type legal.
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virtual bool isTypeLegal(Type *Ty) const {
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return false;
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}
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/// getJumpBufAlignment - returns the target's jmp_buf alignment in bytes
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virtual unsigned getJumpBufAlignment() const {
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return 0;
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}
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/// getJumpBufSize - returns the target's jmp_buf size in bytes.
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virtual unsigned getJumpBufSize() const {
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return 0;
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}
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2012-10-30 12:23:25 +01:00
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/// shouldBuildLookupTables - Return true if switches should be turned into
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/// lookup tables for the target.
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virtual bool shouldBuildLookupTables() const {
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return true;
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}
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2012-12-09 04:12:46 +01:00
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/// getPopcntHwSupport - Return hardware support for population count.
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virtual PopcntHwSupport getPopcntHwSupport(unsigned IntTyWidthInBit) const {
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return None;
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}
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2012-12-12 00:26:14 +01:00
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/// getIntImmCost - Return the expected cost of materializing the given
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/// integer immediate of the specified type.
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virtual unsigned getIntImmCost(const APInt&, Type*) const {
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// The default assumption is that the immediate is cheap.
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return 1;
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}
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2012-10-19 01:22:48 +02:00
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};
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2012-10-24 19:22:41 +02:00
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/// VectorTargetTransformInfo - This interface is used by the vectorizers
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/// to estimate the profitability of vectorization for different instructions.
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2012-12-23 08:23:55 +01:00
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/// This interface provides the cost of different IR instructions. The cost
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/// is unit-less and represents the estimated throughput of the instruction
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/// (not the latency!) assuming that all branches are predicted, cache is hit,
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/// etc.
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2012-10-19 01:22:48 +02:00
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class VectorTargetTransformInfo {
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public:
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virtual ~VectorTargetTransformInfo() {}
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2012-12-24 09:57:47 +01:00
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enum ShuffleKind {
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2012-12-24 11:04:03 +01:00
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Broadcast, // Broadcast element 0 to all other elements.
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Reverse, // Reverse the order of the vector.
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InsertSubvector, // InsertSubvector. Index indicates start offset.
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ExtractSubvector // ExtractSubvector Index indicates start offset.
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};
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2012-10-27 01:49:28 +02:00
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/// Returns the expected cost of arithmetic ops, such as mul, xor, fsub, etc.
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virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const {
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return 1;
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}
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2012-12-24 09:57:47 +01:00
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/// Returns the cost of a shuffle instruction of kind Kind and of type Tp.
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/// The index parameter is used by some of the shuffle kinds to add
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/// additional information.
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virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
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int Index) const {
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return 1;
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}
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2012-10-27 01:49:28 +02:00
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/// Returns the expected cost of cast instructions, such as bitcast, trunc,
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/// zext, etc.
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virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
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Type *Src) const {
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return 1;
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}
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/// Returns the expected cost of control-flow related instrutctions such as
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/// Phi, Ret, Br.
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virtual unsigned getCFInstrCost(unsigned Opcode) const {
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return 1;
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}
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/// Returns the expected cost of compare and select instructions.
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virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
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Type *CondTy = 0) const {
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return 1;
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}
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/// Returns the expected cost of vector Insert and Extract.
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2012-11-02 23:31:56 +01:00
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/// Use -1 to indicate that there is no information on the index value.
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2012-10-27 01:49:28 +02:00
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virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
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unsigned Index = -1) const {
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2012-10-27 01:49:28 +02:00
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return 1;
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}
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/// Returns the cost of Load and Store instructions.
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2012-10-24 19:22:41 +02:00
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virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
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unsigned Alignment,
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unsigned AddressSpace) const {
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return 1;
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}
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2012-12-09 21:42:17 +01:00
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/// Returns the cost of Intrinsic instructions.
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virtual unsigned getIntrinsicInstrCost(Intrinsic::ID,
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Type *RetTy,
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ArrayRef<Type*> Tys) const {
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return 1;
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}
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2012-10-26 06:28:02 +02:00
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/// Returns the number of pieces into which the provided type must be
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/// split during legalization. Zero is returned when the answer is unknown.
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virtual unsigned getNumberOfParts(Type *Tp) const {
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return 0;
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}
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2012-10-19 01:22:48 +02:00
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};
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} // End llvm namespace
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#endif
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