2012-05-04 22:18:50 +02:00
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//===- NVPTX.td - Describe the NVPTX Target Machine -----------*- tblgen -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// This is the top level entry point for the NVPTX target.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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include "NVPTXRegisterInfo.td"
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include "NVPTXInstrInfo.td"
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//===----------------------------------------------------------------------===//
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// Subtarget Features.
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// - We use the SM version number instead of explicit feature table.
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// - Need at least one feature to avoid generating zero sized array by
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// TableGen in NVPTXGenSubtarget.inc.
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//===----------------------------------------------------------------------===//
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2012-11-12 04:16:43 +01:00
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// SM Versions
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def SM20 : SubtargetFeature<"sm_20", "SmVersion", "20",
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"Target SM 2.0">;
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def SM21 : SubtargetFeature<"sm_21", "SmVersion", "21",
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"Target SM 2.1">;
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def SM30 : SubtargetFeature<"sm_30", "SmVersion", "30",
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"Target SM 3.0">;
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def SM35 : SubtargetFeature<"sm_35", "SmVersion", "35",
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"Target SM 3.5">;
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// PTX Versions
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def PTX30 : SubtargetFeature<"ptx30", "PTXVersion", "30",
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"Use PTX version 3.0">;
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def PTX31 : SubtargetFeature<"ptx31", "PTXVersion", "31",
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"Use PTX version 3.1">;
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2012-05-04 22:18:50 +02:00
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//===----------------------------------------------------------------------===//
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// NVPTX supported processors.
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//===----------------------------------------------------------------------===//
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class Proc<string Name, list<SubtargetFeature> Features>
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: Processor<Name, NoItineraries, Features>;
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2012-11-12 04:16:43 +01:00
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def : Proc<"sm_20", [SM20]>;
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def : Proc<"sm_21", [SM21]>;
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def : Proc<"sm_30", [SM30]>;
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def : Proc<"sm_35", [SM35]>;
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2012-05-04 22:18:50 +02:00
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def NVPTXInstrInfo : InstrInfo {
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}
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2013-08-06 16:13:27 +02:00
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def NVPTXAsmWriter : AsmWriter {
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bit isMCAsmWriter = 1;
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string AsmWriterClassName = "InstPrinter";
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}
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2012-05-04 22:18:50 +02:00
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def NVPTX : Target {
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let InstructionSet = NVPTXInstrInfo;
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2013-08-06 16:13:27 +02:00
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let AssemblyWriters = [NVPTXAsmWriter];
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2012-05-04 22:18:50 +02:00
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}
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