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llvm-mirror/test/CodeGen/X86/sse1.ll

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; Tests for SSE1 and below, without SSE2+.
; RUN: llc < %s -mcpu=pentium3 -O3 | FileCheck %s
define <8 x i16> @test1(<8 x i32> %a) nounwind {
; CHECK: test1
ret <8 x i16> zeroinitializer
}