2012-05-06 16:25:16 +02:00
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; RUN: llc -march=x86-64 -mcpu=core2 < %s | FileCheck %s
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CodeGenPrepare: Add a transform to turn selects into branches in some cases.
This came up when a change in block placement formed a cmov and slowed down a
hot loop by 50%:
ucomisd (%rdi), %xmm0
cmovbel %edx, %esi
cmov is a really bad choice in this context because it doesn't get branch
prediction. If we emit it as a branch, an out-of-order CPU can do a better job
(if the branch is predicted right) and avoid waiting for the slow load+compare
instruction to finish. Of course it won't help if the branch is unpredictable,
but those are really rare in practice.
This patch uses a dumb conservative heuristic, it turns all cmovs that have one
use and a direct memory operand into branches. cmovs usually save some code
size, so we disable the transform in -Os mode. In-Order architectures are
unlikely to benefit as well, those are included in the
"predictableSelectIsExpensive" flag.
It would be better to reuse branch probability info here, but BPI doesn't
support select instructions currently. It would make sense to use the same
heuristics as the if-converter pass, which does the opposite direction of this
transform.
Test suite shows a small improvement here and there on corei7-level machines,
but the actual results depend a lot on the used microarchitecture. The
transformation is currently disabled by default and available by passing the
-enable-cgp-select2branch flag to the code generator.
Thanks to Chandler for the initial test case to him and Evan Cheng for providing
me with comments and test-suite numbers that were more stable than mine :)
llvm-svn: 156234
2012-05-05 14:49:22 +02:00
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; cmp with single-use load, should not form cmov.
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define i32 @test1(double %a, double* nocapture %b, i32 %x, i32 %y) {
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%load = load double* %b, align 8
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%cmp = fcmp olt double %load, %a
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%cond = select i1 %cmp, i32 %x, i32 %y
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ret i32 %cond
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; CHECK: test1:
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; CHECK: ucomisd
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; CHECK-NOT: cmov
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; CHECK: j
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; CHECK-NOT: cmov
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}
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; Sanity check: no load.
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define i32 @test2(double %a, double %b, i32 %x, i32 %y) {
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%cmp = fcmp ogt double %a, %b
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%cond = select i1 %cmp, i32 %x, i32 %y
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ret i32 %cond
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; CHECK: test2:
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; CHECK: ucomisd
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; CHECK: cmov
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}
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; Multiple uses of %a, should not form cmov.
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define i32 @test3(i32 %a, i32* nocapture %b, i32 %x) {
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%load = load i32* %b, align 4
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%cmp = icmp ult i32 %load, %a
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%cond = select i1 %cmp, i32 %a, i32 %x
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ret i32 %cond
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; CHECK: test3:
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; CHECK: cmpl
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; CHECK-NOT: cmov
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; CHECK: j
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; CHECK-NOT: cmov
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}
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; Multiple uses of the load.
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define i32 @test4(i32 %a, i32* nocapture %b, i32 %x, i32 %y) {
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%load = load i32* %b, align 4
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%cmp = icmp ult i32 %load, %a
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%cond = select i1 %cmp, i32 %x, i32 %y
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%add = add i32 %cond, %load
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ret i32 %add
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; CHECK: test4:
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; CHECK: cmpl
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; CHECK: cmov
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}
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; Multiple uses of the cmp.
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define i32 @test5(i32 %a, i32* nocapture %b, i32 %x, i32 %y) {
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%load = load i32* %b, align 4
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%cmp = icmp ult i32 %load, %a
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%cmp1 = icmp ugt i32 %load, %a
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%cond = select i1 %cmp1, i32 %a, i32 %y
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%cond5 = select i1 %cmp, i32 %cond, i32 %x
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ret i32 %cond5
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; CHECK: test5:
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; CHECK: cmpl
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; CHECK: cmov
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; CHECK: cmov
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}
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