llvm-mirror/test/CodeGen/ARM/fast-isel-redefinition.ll

; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort -optimize-regalloc -regalloc=basic < %s
; This isn't exactly a useful set of command-line options, but check that it
; doesn't crash.  (It was crashing because a register was getting redefined.)

target triple = "thumbv7-apple-macosx10.6.7"

define i32 @f(i32* %x) nounwind ssp {
  %y = getelementptr inbounds i32* %x, i32 5000
  %tmp103 = load i32* %y, align 4
  ret i32 %tmp103
}
Fix ARM FastISel tests, as a first step to enabling ARM FastISel ARM FastISel is currently only enabled for iOS non-Thumb1, and I'm working on enabling it for other targets. As a first step I've fixed some of the tests. Changes to ARM FastISel tests: - Different triples don't generate the same relocations (especially movw/movt versus constant pool loads). Use a regex to allow either. - Mangling is different. Use a regex to allow either. - The reserved registers are sometimes different, so registers get allocated in a different order. Capture the names only where this occurs. - Add -verify-machineinstrs to some tests where it works. It doesn't work everywhere it should yet. - Add -fast-isel-abort to many tests that didn't have it before. - Split out the VarArg test from fast-isel-call.ll into its own test. This simplifies test setup because of --check-prefix. Patch by JF Bastien llvm-svn: 181801 2013-05-14 18:26:38 +02:00			`; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort -optimize-regalloc -regalloc=basic < %s`
Re-committing r130454, which does not in fact break anything. Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. rdar://problem/9338332 . llvm-svn: 130539 2011-04-29 23:22:56 +02:00			`; This isn't exactly a useful set of command-line options, but check that it`
			`; doesn't crash. (It was crashing because a register was getting redefined.)`

			`target triple = "thumbv7-apple-macosx10.6.7"`

			`define i32 @f(i32* %x) nounwind ssp {`
			`%y = getelementptr inbounds i32* %x, i32 5000`
			`%tmp103 = load i32* %y, align 4`
			`ret i32 %tmp103`
			`}`