2014-05-24 14:50:23 +02:00
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; RUN: llc -march=arm64 -aarch64-neon-syntax=apple < %s | FileCheck %s
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2014-03-29 11:18:08 +01:00
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define i64 @test_vaddlv_s32(<2 x i32> %a1) nounwind readnone {
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; CHECK: test_vaddlv_s32
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; CHECK: saddlp.1d v[[REGNUM:[0-9]+]], v[[INREG:[0-9]+]]
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; CHECK-NEXT: fmov x[[OUTREG:[0-9]+]], d[[REGNUM]]
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; CHECK-NEXT: ret
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entry:
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2014-05-24 14:50:23 +02:00
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%vaddlv.i = tail call i64 @llvm.aarch64.neon.saddlv.i64.v2i32(<2 x i32> %a1) nounwind
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2014-03-29 11:18:08 +01:00
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ret i64 %vaddlv.i
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}
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define i64 @test_vaddlv_u32(<2 x i32> %a1) nounwind readnone {
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; CHECK: test_vaddlv_u32
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; CHECK: uaddlp.1d v[[REGNUM:[0-9]+]], v[[INREG:[0-9]+]]
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; CHECK-NEXT: fmov x[[OUTREG:[0-9]+]], d[[REGNUM]]
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; CHECK-NEXT: ret
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entry:
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2014-05-24 14:50:23 +02:00
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%vaddlv.i = tail call i64 @llvm.aarch64.neon.uaddlv.i64.v2i32(<2 x i32> %a1) nounwind
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2014-03-29 11:18:08 +01:00
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ret i64 %vaddlv.i
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}
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2014-05-24 14:50:23 +02:00
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declare i64 @llvm.aarch64.neon.uaddlv.i64.v2i32(<2 x i32>) nounwind readnone
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2014-03-29 11:18:08 +01:00
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2014-05-24 14:50:23 +02:00
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declare i64 @llvm.aarch64.neon.saddlv.i64.v2i32(<2 x i32>) nounwind readnone
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2014-03-29 11:18:08 +01:00
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