llvm-mirror/test/CodeGen/X86/vec_set-D.ll

; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq

define <4 x i32> @t(i32 %x, i32 %y) nounwind  {
	%tmp1 = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0
	%tmp2 = insertelement <4 x i32> %tmp1, i32 %y, i32 1
	ret <4 x i32> %tmp2
}
Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81290 2009-09-09 01:54:48 +02:00			`; RUN: llc < %s -march=x86 -mattr=+sse2 \| grep movq`
Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine. llvm-svn: 50838 2008-05-08 02:57:18 +02:00
			`define <4 x i32> @t(i32 %x, i32 %y) nounwind {`
			`%tmp1 = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0`
			`%tmp2 = insertelement <4 x i32> %tmp1, i32 %y, i32 1`
			`ret <4 x i32> %tmp2`
			`}`