RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 12:02:58 +02:00
Code Issues Projects Releases Wiki Activity
5c83517500
llvm-mirror/test/CodeGen/ARM/mult-alt-generic-arm.ll

324 lines
9.4 KiB
LLVM
Raw Normal View History

Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call Summary: AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output. The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as. All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler. Changes since review (and last commit attempt): - Fixed test failures that were missed due to configuration of local build. (fixes crash.ll and a couple others). - Fixed tests that happened to pass because the local build was on X86 (should fix 2007-12-17-InvokeAsm.ll) - mature-mc-support.ll's should no longer require all targets to be compiled. (should fix ARM and PPC buildbots) - Object output (-filetype=obj and similar) now forces the integrated assembler to be enabled regardless of default setting or -no-integrated-as. (should fix SystemZ buildbots) Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2686 llvm-svn: 201333
2014-02-13 15:44:26 +01:00
; RUN: llc < %s -march=arm -no-integrated-as
Inline asm mult-alt constraint tests. llvm-svn: 118107
2010-11-03 00:01:44 +01:00
; ModuleID = 'mult-alt-generic.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
target triple = "arm"
@mout0 = common global i32 0, align 4
@min1 = common global i32 0, align 4
@marray = common global [2 x i32] zeroinitializer, align 4
define arm_aapcscc void @single_m() nounwind {
entry:
call void asm "foo $1,$0", "=*m,*m"(i32* @mout0, i32* @min1) nounwind
ret void
}
define arm_aapcscc void @single_o() nounwind {
entry:
%out0 = alloca i32, align 4
%index = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %index, align 4
ret void
}
define arm_aapcscc void @single_V() nounwind {
entry:
ret void
}
define arm_aapcscc void @single_lt() nounwind {
entry:
%out0 = alloca i32, align 4
%in1 = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %in1, align 4
%tmp = load i32* %in1, align 4
%0 = call i32 asm "foo $1,$0", "=r,<r"(i32 %tmp) nounwind
store i32 %0, i32* %out0, align 4
%tmp1 = load i32* %in1, align 4
%1 = call i32 asm "foo $1,$0", "=r,r<"(i32 %tmp1) nounwind
store i32 %1, i32* %out0, align 4
ret void
}
define arm_aapcscc void @single_gt() nounwind {
entry:
%out0 = alloca i32, align 4
%in1 = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %in1, align 4
%tmp = load i32* %in1, align 4
%0 = call i32 asm "foo $1,$0", "=r,>r"(i32 %tmp) nounwind
store i32 %0, i32* %out0, align 4
%tmp1 = load i32* %in1, align 4
%1 = call i32 asm "foo $1,$0", "=r,r>"(i32 %tmp1) nounwind
store i32 %1, i32* %out0, align 4
ret void
}
define arm_aapcscc void @single_r() nounwind {
entry:
%out0 = alloca i32, align 4
%in1 = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %in1, align 4
%tmp = load i32* %in1, align 4
%0 = call i32 asm "foo $1,$0", "=r,r"(i32 %tmp) nounwind
store i32 %0, i32* %out0, align 4
ret void
}
define arm_aapcscc void @single_i() nounwind {
entry:
%out0 = alloca i32, align 4
store i32 0, i32* %out0, align 4
%0 = call i32 asm "foo $1,$0", "=r,i"(i32 1) nounwind
store i32 %0, i32* %out0, align 4
ret void
}
define arm_aapcscc void @single_n() nounwind {
entry:
%out0 = alloca i32, align 4
store i32 0, i32* %out0, align 4
%0 = call i32 asm "foo $1,$0", "=r,n"(i32 1) nounwind
store i32 %0, i32* %out0, align 4
ret void
}
define arm_aapcscc void @single_E() nounwind {
entry:
%out0 = alloca double, align 8
store double 0.000000e+000, double* %out0, align 8
; No lowering support.
; %0 = call double asm "foo $1,$0", "=r,E"(double 1.000000e+001) nounwind
; store double %0, double* %out0, align 8
ret void
}
define arm_aapcscc void @single_F() nounwind {
entry:
%out0 = alloca double, align 8
store double 0.000000e+000, double* %out0, align 8
; No lowering support.
; %0 = call double asm "foo $1,$0", "=r,F"(double 1.000000e+000) nounwind
; store double %0, double* %out0, align 8
ret void
}
define arm_aapcscc void @single_s() nounwind {
entry:
%out0 = alloca i32, align 4
store i32 0, i32* %out0, align 4
ret void
}
define arm_aapcscc void @single_g() nounwind {
entry:
%out0 = alloca i32, align 4
%in1 = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %in1, align 4
%tmp = load i32* %in1, align 4
%0 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp) nounwind
store i32 %0, i32* %out0, align 4
%tmp1 = load i32* @min1, align 4
%1 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp1) nounwind
store i32 %1, i32* %out0, align 4
%2 = call i32 asm "foo $1,$0", "=r,imr"(i32 1) nounwind
store i32 %2, i32* %out0, align 4
ret void
}
define arm_aapcscc void @single_X() nounwind {
entry:
%out0 = alloca i32, align 4
%in1 = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %in1, align 4
%tmp = load i32* %in1, align 4
%0 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp) nounwind
store i32 %0, i32* %out0, align 4
%tmp1 = load i32* @min1, align 4
%1 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp1) nounwind
store i32 %1, i32* %out0, align 4
%2 = call i32 asm "foo $1,$0", "=r,X"(i32 1) nounwind
store i32 %2, i32* %out0, align 4
%3 = call i32 asm "foo $1,$0", "=r,X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind
store i32 %3, i32* %out0, align 4
; No lowering support.
; %4 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+001) nounwind
; store i32 %4, i32* %out0, align 4
; %5 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+000) nounwind
; store i32 %5, i32* %out0, align 4
ret void
}
define arm_aapcscc void @single_p() nounwind {
entry:
%out0 = alloca i32, align 4
store i32 0, i32* %out0, align 4
%0 = call i32 asm "foo $1,$0", "=r,r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind
store i32 %0, i32* %out0, align 4
ret void
}
define arm_aapcscc void @multi_m() nounwind {
entry:
%tmp = load i32* @min1, align 4
call void asm "foo $1,$0", "=*m|r,m|r"(i32* @mout0, i32 %tmp) nounwind
ret void
}
define arm_aapcscc void @multi_o() nounwind {
entry:
%out0 = alloca i32, align 4
%index = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %index, align 4
ret void
}
define arm_aapcscc void @multi_V() nounwind {
entry:
ret void
}
define arm_aapcscc void @multi_lt() nounwind {
entry:
%out0 = alloca i32, align 4
%in1 = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %in1, align 4
%tmp = load i32* %in1, align 4
%0 = call i32 asm "foo $1,$0", "=r|r,r|<r"(i32 %tmp) nounwind
store i32 %0, i32* %out0, align 4
%tmp1 = load i32* %in1, align 4
%1 = call i32 asm "foo $1,$0", "=r|r,r|r<"(i32 %tmp1) nounwind
store i32 %1, i32* %out0, align 4
ret void
}
define arm_aapcscc void @multi_gt() nounwind {
entry:
%out0 = alloca i32, align 4
%in1 = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %in1, align 4
%tmp = load i32* %in1, align 4
%0 = call i32 asm "foo $1,$0", "=r|r,r|>r"(i32 %tmp) nounwind
store i32 %0, i32* %out0, align 4
%tmp1 = load i32* %in1, align 4
%1 = call i32 asm "foo $1,$0", "=r|r,r|r>"(i32 %tmp1) nounwind
store i32 %1, i32* %out0, align 4
ret void
}
define arm_aapcscc void @multi_r() nounwind {
entry:
%out0 = alloca i32, align 4
%in1 = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %in1, align 4
%tmp = load i32* %in1, align 4
%0 = call i32 asm "foo $1,$0", "=r|r,r|m"(i32 %tmp) nounwind
store i32 %0, i32* %out0, align 4
ret void
}
define arm_aapcscc void @multi_i() nounwind {
entry:
%out0 = alloca i32, align 4
store i32 0, i32* %out0, align 4
%0 = call i32 asm "foo $1,$0", "=r|r,r|i"(i32 1) nounwind
store i32 %0, i32* %out0, align 4
ret void
}
define arm_aapcscc void @multi_n() nounwind {
entry:
%out0 = alloca i32, align 4
store i32 0, i32* %out0, align 4
%0 = call i32 asm "foo $1,$0", "=r|r,r|n"(i32 1) nounwind
store i32 %0, i32* %out0, align 4
ret void
}
define arm_aapcscc void @multi_E() nounwind {
entry:
%out0 = alloca double, align 8
store double 0.000000e+000, double* %out0, align 8
; No lowering support.
; %0 = call double asm "foo $1,$0", "=r|r,r|E"(double 1.000000e+001) nounwind
; store double %0, double* %out0, align 8
ret void
}
define arm_aapcscc void @multi_F() nounwind {
entry:
%out0 = alloca double, align 8
store double 0.000000e+000, double* %out0, align 8
; No lowering support.
; %0 = call double asm "foo $1,$0", "=r|r,r|F"(double 1.000000e+000) nounwind
; store double %0, double* %out0, align 8
ret void
}
define arm_aapcscc void @multi_s() nounwind {
entry:
%out0 = alloca i32, align 4
store i32 0, i32* %out0, align 4
ret void
}
define arm_aapcscc void @multi_g() nounwind {
entry:
%out0 = alloca i32, align 4
%in1 = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %in1, align 4
%tmp = load i32* %in1, align 4
%0 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp) nounwind
store i32 %0, i32* %out0, align 4
%tmp1 = load i32* @min1, align 4
%1 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp1) nounwind
store i32 %1, i32* %out0, align 4
%2 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 1) nounwind
store i32 %2, i32* %out0, align 4
ret void
}
define arm_aapcscc void @multi_X() nounwind {
entry:
%out0 = alloca i32, align 4
%in1 = alloca i32, align 4
store i32 0, i32* %out0, align 4
store i32 1, i32* %in1, align 4
%tmp = load i32* %in1, align 4
%0 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp) nounwind
store i32 %0, i32* %out0, align 4
%tmp1 = load i32* @min1, align 4
%1 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp1) nounwind
store i32 %1, i32* %out0, align 4
%2 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 1) nounwind
store i32 %2, i32* %out0, align 4
%3 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind
store i32 %3, i32* %out0, align 4
; No lowering support.
; %4 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+001) nounwind
; store i32 %4, i32* %out0, align 4
; %5 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+000) nounwind
; store i32 %5, i32* %out0, align 4
ret void
}
define arm_aapcscc void @multi_p() nounwind {
entry:
%out0 = alloca i32, align 4
store i32 0, i32* %out0, align 4
%0 = call i32 asm "foo $1,$0", "=r|r,r|r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind
store i32 %0, i32* %out0, align 4
ret void
}
Reference in New Issue Copy Permalink