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llvm-mirror/test/MC/VE/BSWP.s

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[VE] Support logical operation instructions in MC layer Summary: Add regression tests of asmparser, mccodeemitter, and disassembler for logical operation instructions. Also change asmparser to support CMOV instruction. And, add new EQV/MRG/NND isntructions also. Differential Revision: https://reviews.llvm.org/D81219
2020-06-05 16:57:37 +02:00
# RUN: llvm-mc -triple=ve --show-encoding < %s \
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
# RUN: | FileCheck %s --check-prefixes=CHECK-INST
# CHECK-INST: bswp %s11, %s11, 0
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x8b,0x00,0x0b,0x2b]
bswp %s11, %s11, 0
# CHECK-INST: bswp %s11, %s11, 1
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x8b,0x01,0x0b,0x2b]
bswp %s11, %s11, 1
# CHECK-INST: bswp %s11, (32)1, 0
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x20,0x00,0x0b,0x2b]
bswp %s11, (32)1, 0
# CHECK-INST: bswp %s11, (32)0, 1
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x60,0x01,0x0b,0x2b]
bswp %s11, (32)0, 1
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