2021-03-15 07:07:42 +01:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P10
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P10
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P9
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P9
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_0_int8_t_uint8_t(i64 %ptr) {
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; CHECK-LABEL: ld_0_int8_t_uint8_t:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lbz r3, 0(r3)
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; CHECK-NEXT: extsb r3, r3
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; CHECK-NEXT: blr
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entry:
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%0 = inttoptr i64 %ptr to i8*
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%1 = load atomic i8, i8* %0 monotonic, align 1
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ret i8 %1
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_align16_int8_t_uint8_t(i8* nocapture readonly %ptr) {
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; CHECK-LABEL: ld_align16_int8_t_uint8_t:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lbz r3, 8(r3)
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; CHECK-NEXT: extsb r3, r3
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; CHECK-NEXT: blr
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entry:
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%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
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%0 = load atomic i8, i8* %add.ptr monotonic, align 1
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ret i8 %0
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_align32_int8_t_uint8_t(i8* nocapture readonly %ptr) {
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; CHECK-P10-LABEL: ld_align32_int8_t_uint8_t:
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; CHECK-P10: # %bb.0: # %entry
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; CHECK-P10-NEXT: pli r4, 99999000
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; CHECK-P10-NEXT: lbzx r3, r3, r4
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; CHECK-P10-NEXT: extsb r3, r3
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; CHECK-P10-NEXT: blr
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;
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; CHECK-PREP10-LABEL: ld_align32_int8_t_uint8_t:
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; CHECK-PREP10: # %bb.0: # %entry
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; CHECK-PREP10-NEXT: lis r4, 1525
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; CHECK-PREP10-NEXT: ori r4, r4, 56600
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; CHECK-PREP10-NEXT: lbzx r3, r3, r4
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; CHECK-PREP10-NEXT: extsb r3, r3
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; CHECK-PREP10-NEXT: blr
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entry:
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%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
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%0 = load atomic i8, i8* %add.ptr monotonic, align 1
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ret i8 %0
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_align64_int8_t_uint8_t(i8* nocapture readonly %ptr) {
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; CHECK-P10-LABEL: ld_align64_int8_t_uint8_t:
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; CHECK-P10: # %bb.0: # %entry
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; CHECK-P10-NEXT: pli r4, 244140625
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; CHECK-P10-NEXT: rldic r4, r4, 12, 24
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; CHECK-P10-NEXT: lbzx r3, r3, r4
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; CHECK-P10-NEXT: extsb r3, r3
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; CHECK-P10-NEXT: blr
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;
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; CHECK-PREP10-LABEL: ld_align64_int8_t_uint8_t:
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; CHECK-PREP10: # %bb.0: # %entry
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; CHECK-PREP10-NEXT: lis r4, 3725
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; CHECK-PREP10-NEXT: ori r4, r4, 19025
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; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
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; CHECK-PREP10-NEXT: lbzx r3, r3, r4
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; CHECK-PREP10-NEXT: extsb r3, r3
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; CHECK-PREP10-NEXT: blr
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entry:
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%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
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%0 = load atomic i8, i8* %add.ptr monotonic, align 1
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ret i8 %0
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_reg_int8_t_uint8_t(i8* nocapture readonly %ptr, i64 %off) {
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; CHECK-LABEL: ld_reg_int8_t_uint8_t:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lbzx r3, r3, r4
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; CHECK-NEXT: extsb r3, r3
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; CHECK-NEXT: blr
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entry:
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%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
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%0 = load atomic i8, i8* %add.ptr monotonic, align 1
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ret i8 %0
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_or_int8_t_uint8_t(i64 %ptr, i8 zeroext %off) {
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; CHECK-LABEL: ld_or_int8_t_uint8_t:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: or r3, r4, r3
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; CHECK-NEXT: lbz r3, 0(r3)
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; CHECK-NEXT: extsb r3, r3
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; CHECK-NEXT: blr
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entry:
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%conv = zext i8 %off to i64
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%or = or i64 %conv, %ptr
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%0 = inttoptr i64 %or to i8*
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%1 = load atomic i8, i8* %0 monotonic, align 1
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ret i8 %1
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_not_disjoint16_int8_t_uint8_t(i64 %ptr) {
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; CHECK-LABEL: ld_not_disjoint16_int8_t_uint8_t:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: ori r3, r3, 6
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; CHECK-NEXT: lbz r3, 0(r3)
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; CHECK-NEXT: extsb r3, r3
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; CHECK-NEXT: blr
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entry:
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%or = or i64 %ptr, 6
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%0 = inttoptr i64 %or to i8*
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%1 = load atomic i8, i8* %0 monotonic, align 1
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ret i8 %1
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_disjoint_align16_int8_t_uint8_t(i64 %ptr) {
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; CHECK-LABEL: ld_disjoint_align16_int8_t_uint8_t:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: rldicr r3, r3, 0, 51
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; CHECK-NEXT: lbz r3, 24(r3)
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; CHECK-NEXT: extsb r3, r3
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; CHECK-NEXT: blr
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entry:
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%and = and i64 %ptr, -4096
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%or = or i64 %and, 24
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%0 = inttoptr i64 %or to i8*
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%1 = load atomic i8, i8* %0 monotonic, align 8
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ret i8 %1
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_not_disjoint32_int8_t_uint8_t(i64 %ptr) {
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; CHECK-LABEL: ld_not_disjoint32_int8_t_uint8_t:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: ori r3, r3, 34463
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; CHECK-NEXT: oris r3, r3, 1
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; CHECK-NEXT: lbz r3, 0(r3)
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; CHECK-NEXT: extsb r3, r3
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; CHECK-NEXT: blr
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entry:
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%or = or i64 %ptr, 99999
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%0 = inttoptr i64 %or to i8*
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%1 = load atomic i8, i8* %0 monotonic, align 1
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ret i8 %1
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_disjoint_align32_int8_t_uint8_t(i64 %ptr) {
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; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_uint8_t:
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; CHECK-P10: # %bb.0: # %entry
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; CHECK-P10-NEXT: lis r4, -15264
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; CHECK-P10-NEXT: and r3, r3, r4
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; CHECK-P10-NEXT: pli r4, 999990000
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; CHECK-P10-NEXT: lbzx r3, r3, r4
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; CHECK-P10-NEXT: extsb r3, r3
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; CHECK-P10-NEXT: blr
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;
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; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint8_t:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: lis r4, -15264
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; CHECK-P9-NEXT: and r3, r3, r4
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; CHECK-P9-NEXT: lis r4, 15258
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; CHECK-P9-NEXT: ori r4, r4, 41712
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; CHECK-P9-NEXT: lbzx r3, r3, r4
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; CHECK-P9-NEXT: extsb r3, r3
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; CHECK-P9-NEXT: blr
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;
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; CHECK-P8-LABEL: ld_disjoint_align32_int8_t_uint8_t:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: lis r4, -15264
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; CHECK-P8-NEXT: lis r5, 15258
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; CHECK-P8-NEXT: and r3, r3, r4
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; CHECK-P8-NEXT: ori r4, r5, 41712
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; CHECK-P8-NEXT: lbzx r3, r3, r4
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; CHECK-P8-NEXT: extsb r3, r3
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; CHECK-P8-NEXT: blr
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entry:
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%and = and i64 %ptr, -1000341504
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%or = or i64 %and, 999990000
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%0 = inttoptr i64 %or to i8*
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%1 = load atomic i8, i8* %0 monotonic, align 16
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ret i8 %1
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_not_disjoint64_int8_t_uint8_t(i64 %ptr) {
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; CHECK-P10-LABEL: ld_not_disjoint64_int8_t_uint8_t:
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; CHECK-P10: # %bb.0: # %entry
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; CHECK-P10-NEXT: pli r4, 232
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; CHECK-P10-NEXT: pli r5, 3567587329
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; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
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; CHECK-P10-NEXT: or r3, r3, r5
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; CHECK-P10-NEXT: lbz r3, 0(r3)
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; CHECK-P10-NEXT: extsb r3, r3
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; CHECK-P10-NEXT: blr
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;
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; CHECK-PREP10-LABEL: ld_not_disjoint64_int8_t_uint8_t:
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; CHECK-PREP10: # %bb.0: # %entry
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; CHECK-PREP10-NEXT: li r4, 29
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; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
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; CHECK-PREP10-NEXT: oris r4, r4, 54437
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; CHECK-PREP10-NEXT: ori r4, r4, 4097
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; CHECK-PREP10-NEXT: or r3, r3, r4
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; CHECK-PREP10-NEXT: lbz r3, 0(r3)
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; CHECK-PREP10-NEXT: extsb r3, r3
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; CHECK-PREP10-NEXT: blr
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entry:
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%or = or i64 %ptr, 1000000000001
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%0 = inttoptr i64 %or to i8*
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%1 = load atomic i8, i8* %0 monotonic, align 1
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ret i8 %1
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}
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; Function Attrs: nofree norecurse nounwind uwtable willreturn
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define dso_local signext i8 @ld_disjoint_align64_int8_t_uint8_t(i64 %ptr) {
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; CHECK-P10-LABEL: ld_disjoint_align64_int8_t_uint8_t:
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; CHECK-P10: # %bb.0: # %entry
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; CHECK-P10-NEXT: pli r4, 244140625
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; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
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; CHECK-P10-NEXT: rldic r4, r4, 12, 24
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; CHECK-P10-NEXT: lbzx r3, r3, r4
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; CHECK-P10-NEXT: extsb r3, r3
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; CHECK-P10-NEXT: blr
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;
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; CHECK-PREP10-LABEL: ld_disjoint_align64_int8_t_uint8_t:
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; CHECK-PREP10: # %bb.0: # %entry
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; CHECK-PREP10-NEXT: lis r4, 3725
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; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
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; CHECK-PREP10-NEXT: ori r4, r4, 19025
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; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
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; CHECK-PREP10-NEXT: lbzx r3, r3, r4
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; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
%1 = load atomic i8, i8* %0 monotonic, align 4096
|
|
|
|
|
ret i8 %1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align16_int8_t_uint8_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align16_int8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lbz r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
|
|
|
|
|
ret i8 %0
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align32_int8_t_uint8_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align32_int8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r3, 153
|
|
|
|
|
; CHECK-NEXT: lbz r3, -27108(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
|
|
|
|
|
ret i8 %0
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align64_int8_t_uint8_t() {
|
|
|
|
|
; CHECK-P10-LABEL: ld_cst_align64_int8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r3, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lbz r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_cst_align64_int8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r3, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r3, r3, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
|
|
|
|
|
ret i8 %0
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_0_int8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_0_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_align16_int8_t_uint16_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_align16_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lhz r3, 8(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_align32_int8_t_uint16_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_align64_int8_t_uint16_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_reg_int8_t_uint16_t(i8* nocapture readonly %ptr, i64 %off) {
|
|
|
|
|
; CHECK-LABEL: ld_reg_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_or_int8_t_uint16_t(i64 %ptr, i8 zeroext %off) {
|
|
|
|
|
; CHECK-LABEL: ld_or_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv1 = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_not_disjoint16_int8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint16_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_disjoint_align16_int8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_disjoint_align16_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: lhz r3, 24(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_not_disjoint32_int8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint32_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_disjoint_align32_int8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r4, r4, 41712
|
|
|
|
|
; CHECK-P9-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: ld_disjoint_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: ori r4, r5, 41712
|
|
|
|
|
; CHECK-P8-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 16
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_not_disjoint64_int8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_not_disjoint64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_not_disjoint64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r4, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r4, r4, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_disjoint_align64_int8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_disjoint_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 4096
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align16_int8_t_uint16_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align16_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lhz r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
|
|
|
|
|
%conv = trunc i16 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align32_int8_t_uint16_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r3, 153
|
|
|
|
|
; CHECK-NEXT: lhz r3, -27108(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
|
|
|
|
|
%conv = trunc i16 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align64_int8_t_uint16_t() {
|
|
|
|
|
; CHECK-P10-LABEL: ld_cst_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r3, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_cst_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r3, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r3, r3, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096
|
|
|
|
|
%conv = trunc i16 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_0_int8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_0_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_align16_int8_t_uint32_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_align16_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lwz r3, 8(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_align32_int8_t_uint32_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_align64_int8_t_uint32_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_reg_int8_t_uint32_t(i8* nocapture readonly %ptr, i64 %off) {
|
|
|
|
|
; CHECK-LABEL: ld_reg_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_or_int8_t_uint32_t(i64 %ptr, i8 zeroext %off) {
|
|
|
|
|
; CHECK-LABEL: ld_or_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv1 = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_not_disjoint16_int8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint16_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_disjoint_align16_int8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_disjoint_align16_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: lwz r3, 24(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_not_disjoint32_int8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint32_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_disjoint_align32_int8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r4, r4, 41712
|
|
|
|
|
; CHECK-P9-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: ld_disjoint_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: ori r4, r5, 41712
|
|
|
|
|
; CHECK-P8-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 16
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_not_disjoint64_int8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_not_disjoint64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_not_disjoint64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r4, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r4, r4, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_disjoint_align64_int8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_disjoint_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4096
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align16_int8_t_uint32_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align16_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lwz r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i32, i32* inttoptr (i64 4080 to i32*) monotonic, align 16
|
|
|
|
|
%conv = trunc i32 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align32_int8_t_uint32_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r3, 153
|
|
|
|
|
; CHECK-NEXT: lwz r3, -27108(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i32, i32* inttoptr (i64 9999900 to i32*) monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align64_int8_t_uint32_t() {
|
|
|
|
|
; CHECK-P10-LABEL: ld_cst_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r3, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_cst_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r3, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r3, r3, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i32, i32* inttoptr (i64 1000000000000 to i32*) monotonic, align 4096
|
|
|
|
|
%conv = trunc i32 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_0_int8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_0_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_align16_int8_t_uint64_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_align16_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ld r3, 8(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_align32_int8_t_uint64_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_align64_int8_t_uint64_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_reg_int8_t_uint64_t(i8* nocapture readonly %ptr, i64 %off) {
|
|
|
|
|
; CHECK-LABEL: ld_reg_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_or_int8_t_uint64_t(i64 %ptr, i8 zeroext %off) {
|
|
|
|
|
; CHECK-LABEL: ld_or_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv1 = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_not_disjoint16_int8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint16_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_disjoint_align16_int8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_disjoint_align16_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: ld r3, 24(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_not_disjoint32_int8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint32_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_disjoint_align32_int8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r4, r4, 41712
|
|
|
|
|
; CHECK-P9-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: ld_disjoint_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: ori r4, r5, 41712
|
|
|
|
|
; CHECK-P8-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 16
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_not_disjoint64_int8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_not_disjoint64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_not_disjoint64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r4, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r4, r4, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_disjoint_align64_int8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_disjoint_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 4096
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align16_int8_t_uint64_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align16_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ld r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i64, i64* inttoptr (i64 4080 to i64*) monotonic, align 16
|
|
|
|
|
%conv = trunc i64 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align32_int8_t_uint64_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r3, 153
|
|
|
|
|
; CHECK-NEXT: ld r3, -27108(r3)
|
|
|
|
|
; CHECK-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i64, i64* inttoptr (i64 9999900 to i64*) monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local signext i8 @ld_cst_align64_int8_t_uint64_t() {
|
|
|
|
|
; CHECK-P10-LABEL: ld_cst_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r3, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_cst_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r3, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r3, r3, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: extsb r3, r3
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i64, i64* inttoptr (i64 1000000000000 to i64*) monotonic, align 4096
|
|
|
|
|
%conv = trunc i64 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_0_uint8_t_uint8_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_0_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lbz r3, 0(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i8*
|
|
|
|
|
%1 = load atomic i8, i8* %0 monotonic, align 1
|
|
|
|
|
ret i8 %1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align16_uint8_t_uint8_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_align16_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lbz r3, 8(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = load atomic i8, i8* %add.ptr monotonic, align 1
|
|
|
|
|
ret i8 %0
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align32_uint8_t_uint8_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: lbzx r3, r3, r4
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = load atomic i8, i8* %add.ptr monotonic, align 1
|
|
|
|
|
ret i8 %0
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align64_uint8_t_uint8_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lbzx r3, r3, r4
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = load atomic i8, i8* %add.ptr monotonic, align 1
|
|
|
|
|
ret i8 %0
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_reg_uint8_t_uint8_t(i8* nocapture readonly %ptr, i64 %off) {
|
|
|
|
|
; CHECK-LABEL: ld_reg_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lbzx r3, r3, r4
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = load atomic i8, i8* %add.ptr monotonic, align 1
|
|
|
|
|
ret i8 %0
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_or_uint8_t_uint8_t(i64 %ptr, i8 zeroext %off) {
|
|
|
|
|
; CHECK-LABEL: ld_or_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: lbz r3, 0(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
%1 = load atomic i8, i8* %0 monotonic, align 1
|
|
|
|
|
ret i8 %1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint16_uint8_t_uint8_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint16_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: lbz r3, 0(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
%1 = load atomic i8, i8* %0 monotonic, align 1
|
|
|
|
|
ret i8 %1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align16_uint8_t_uint8_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_disjoint_align16_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: lbz r3, 24(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
%1 = load atomic i8, i8* %0 monotonic, align 8
|
|
|
|
|
ret i8 %1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint32_uint8_t_uint8_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: lbz r3, 0(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
%1 = load atomic i8, i8* %0 monotonic, align 1
|
|
|
|
|
ret i8 %1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint8_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: lbzx r3, r3, r4
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r4, r4, 41712
|
|
|
|
|
; CHECK-P9-NEXT: lbzx r3, r3, r4
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-P9-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: ori r4, r5, 41712
|
|
|
|
|
; CHECK-P8-NEXT: lbzx r3, r3, r4
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-P8-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
%1 = load atomic i8, i8* %0 monotonic, align 16
|
|
|
|
|
ret i8 %1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint64_uint8_t_uint8_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_not_disjoint64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: lbz r3, 0(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r4, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r4, r4, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
%1 = load atomic i8, i8* %0 monotonic, align 1
|
|
|
|
|
ret i8 %1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align64_uint8_t_uint8_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lbzx r3, r3, r4
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
%1 = load atomic i8, i8* %0 monotonic, align 4096
|
|
|
|
|
ret i8 %1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align16_uint8_t_uint8_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align16_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lbz r3, 4080(0)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i8, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
|
|
|
|
|
ret i8 %0
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align32_uint8_t_uint8_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r3, 153
|
|
|
|
|
; CHECK-NEXT: lbz r3, -27108(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i8, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
|
|
|
|
|
ret i8 %0
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align64_uint8_t_uint8_t() {
|
|
|
|
|
; CHECK-P10-LABEL: ld_cst_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r3, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lbz r3, 0(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_cst_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r3, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r3, r3, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lbz r3, 0(r3)
|
[SelectionDAG][Mips][PowerPC][RISCV][WebAssembly] Teach computeKnownBits/ComputeNumSignBits about atomics
Unlike normal loads these don't have an extension field, but we know
from TargetLowering whether these are sign-extending or zero-extending,
and so can optimise away unnecessary extensions.
This was noticed on RISC-V, where sign extensions in the calling
convention would result in unnecessary explicit extension instructions,
but this also fixes some Mips inefficiencies. PowerPC sees churn in the
tests as all the zero extensions are only for promoting 32-bit to
64-bit, but these zero extensions are still not optimised away as they
should be, likely due to i32 being a legal type.
This also simplifies the WebAssembly code somewhat, which currently
works around the lack of target-independent combines with some ugly
patterns that break once they're optimised away.
Re-landed with correct handling in ComputeNumSignBits for Tmp == VTBits,
where zero-extending atomics were incorrectly returning 0 rather than
the (slightly confusing) required return value of 1.
Re-landed again after D102819 fixed PowerPC to correctly zero-extend all
of its atomics as it claimed to do, since the combination of that bug
and this optimisation caused buildbot regressions.
Reviewed By: RKSimon, atanasyan
Differential Revision: https://reviews.llvm.org/D101342
2021-05-20 21:34:23 +02:00
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
|
2021-03-15 07:07:42 +01:00
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i8, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
|
|
|
|
|
ret i8 %0
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_0_uint8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_0_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align16_uint8_t_uint16_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_align16_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lhz r3, 8(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align32_uint8_t_uint16_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align64_uint8_t_uint16_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_reg_uint8_t_uint16_t(i8* nocapture readonly %ptr, i64 %off) {
|
|
|
|
|
; CHECK-LABEL: ld_reg_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_or_uint8_t_uint16_t(i64 %ptr, i8 zeroext %off) {
|
|
|
|
|
; CHECK-LABEL: ld_or_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv1 = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint16_uint8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint16_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align16_uint8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_disjoint_align16_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: lhz r3, 24(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint32_uint8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r4, r4, 41712
|
|
|
|
|
; CHECK-P9-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: ori r4, r5, 41712
|
|
|
|
|
; CHECK-P8-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 16
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint64_uint8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_not_disjoint64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r4, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r4, r4, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 2
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align64_uint8_t_uint16_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%1 = load atomic i16, i16* %0 monotonic, align 4096
|
|
|
|
|
%conv = trunc i16 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align16_uint8_t_uint16_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align16_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lhz r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i16, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
|
|
|
|
|
%conv = trunc i16 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align32_uint8_t_uint16_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r3, 153
|
|
|
|
|
; CHECK-NEXT: lhz r3, -27108(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i16, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
|
|
|
|
|
%conv = trunc i16 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align64_uint8_t_uint16_t() {
|
|
|
|
|
; CHECK-P10-LABEL: ld_cst_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r3, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_cst_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r3, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r3, r3, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lhz r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i16, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096
|
|
|
|
|
%conv = trunc i16 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_0_uint8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_0_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align16_uint8_t_uint32_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_align16_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lwz r3, 8(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align32_uint8_t_uint32_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align64_uint8_t_uint32_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_reg_uint8_t_uint32_t(i8* nocapture readonly %ptr, i64 %off) {
|
|
|
|
|
; CHECK-LABEL: ld_reg_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_or_uint8_t_uint32_t(i64 %ptr, i8 zeroext %off) {
|
|
|
|
|
; CHECK-LABEL: ld_or_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv1 = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint16_uint8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint16_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align16_uint8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_disjoint_align16_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: lwz r3, 24(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint32_uint8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r4, r4, 41712
|
|
|
|
|
; CHECK-P9-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: ori r4, r5, 41712
|
|
|
|
|
; CHECK-P8-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 16
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint64_uint8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_not_disjoint64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r4, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r4, r4, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align64_uint8_t_uint32_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%1 = load atomic i32, i32* %0 monotonic, align 4096
|
|
|
|
|
%conv = trunc i32 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align16_uint8_t_uint32_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align16_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lwz r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i32, i32* inttoptr (i64 4080 to i32*) monotonic, align 16
|
|
|
|
|
%conv = trunc i32 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align32_uint8_t_uint32_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r3, 153
|
|
|
|
|
; CHECK-NEXT: lwz r3, -27108(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i32, i32* inttoptr (i64 9999900 to i32*) monotonic, align 4
|
|
|
|
|
%conv = trunc i32 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align64_uint8_t_uint32_t() {
|
|
|
|
|
; CHECK-P10-LABEL: ld_cst_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r3, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_cst_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r3, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r3, r3, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: lwz r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i32, i32* inttoptr (i64 1000000000000 to i32*) monotonic, align 4096
|
|
|
|
|
%conv = trunc i32 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_0_uint8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_0_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align16_uint8_t_uint64_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_align16_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ld r3, 8(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align32_uint8_t_uint64_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_align64_uint8_t_uint64_t(i8* nocapture readonly %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_reg_uint8_t_uint64_t(i8* nocapture readonly %ptr, i64 %off) {
|
|
|
|
|
; CHECK-LABEL: ld_reg_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_or_uint8_t_uint64_t(i64 %ptr, i8 zeroext %off) {
|
|
|
|
|
; CHECK-LABEL: ld_or_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv1 = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv1
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint16_uint8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint16_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align16_uint8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_disjoint_align16_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: ld r3, 24(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint32_uint8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-LABEL: ld_not_disjoint32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: lis r4, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r4, r4, 41712
|
|
|
|
|
; CHECK-P9-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P9-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r4, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: ori r4, r5, 41712
|
|
|
|
|
; CHECK-P8-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P8-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 16
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_not_disjoint64_uint8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_not_disjoint64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_not_disjoint64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r4, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r4, r4, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_disjoint_align64_uint8_t_uint64_t(i64 %ptr) {
|
|
|
|
|
; CHECK-P10-LABEL: ld_disjoint_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_disjoint_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: ldx r3, r3, r4
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%1 = load atomic i64, i64* %0 monotonic, align 4096
|
|
|
|
|
%conv = trunc i64 %1 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align16_uint8_t_uint64_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align16_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ld r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i64, i64* inttoptr (i64 4080 to i64*) monotonic, align 16
|
|
|
|
|
%conv = trunc i64 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align32_uint8_t_uint64_t() {
|
|
|
|
|
; CHECK-LABEL: ld_cst_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r3, 153
|
|
|
|
|
; CHECK-NEXT: ld r3, -27108(r3)
|
|
|
|
|
; CHECK-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i64, i64* inttoptr (i64 9999900 to i64*) monotonic, align 8
|
|
|
|
|
%conv = trunc i64 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local zeroext i8 @ld_cst_align64_uint8_t_uint64_t() {
|
|
|
|
|
; CHECK-P10-LABEL: ld_cst_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r3, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: ld_cst_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r3, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r3, r3, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: ld r3, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = load atomic i64, i64* inttoptr (i64 1000000000000 to i64*) monotonic, align 4096
|
|
|
|
|
%conv = trunc i64 %0 to i8
|
|
|
|
|
ret i8 %conv
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_0_uint8_t_uint8_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_0_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stb r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i8*
|
|
|
|
|
store atomic i8 %str, i8* %0 monotonic, align 1
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align16_uint8_t_uint8_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_align16_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stb r4, 8(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
store atomic i8 %str, i8* %add.ptr monotonic, align 1
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align32_uint8_t_uint8_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: stbx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: stbx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
store atomic i8 %str, i8* %add.ptr monotonic, align 1
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align64_uint8_t_uint8_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stbx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stbx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
store atomic i8 %str, i8* %add.ptr monotonic, align 1
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_reg_uint8_t_uint8_t(i8* nocapture %ptr, i64 %off, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_reg_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stbx r5, r3, r4
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
store atomic i8 %str, i8* %add.ptr monotonic, align 1
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_or1_uint8_t_uint8_t(i64 %ptr, i8 zeroext %off, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_or1_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: stb r5, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
store atomic i8 %str, i8* %0 monotonic, align 1
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint16_uint8_t_uint8_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint16_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: stb r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
store atomic i8 %str, i8* %0 monotonic, align 1
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align16_uint8_t_uint8_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_disjoint_align16_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: stb r4, 24(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
store atomic i8 %str, i8* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint32_uint8_t_uint8_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: stb r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
store atomic i8 %str, i8* %0 monotonic, align 1
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align32_uint8_t_uint8_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: stbx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r5, r5, 41712
|
|
|
|
|
; CHECK-P9-NEXT: stbx r4, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: st_disjoint_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r6, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: ori r5, r6, 41712
|
|
|
|
|
; CHECK-P8-NEXT: stbx r4, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
store atomic i8 %str, i8* %0 monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint64_uint8_t_uint8_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_not_disjoint64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r6, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r6, r5, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r6
|
|
|
|
|
; CHECK-P10-NEXT: stb r4, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_not_disjoint64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r5, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r5, r5, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: stb r4, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
store atomic i8 %str, i8* %0 monotonic, align 1
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align64_uint8_t_uint8_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stbx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_disjoint_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stbx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i8*
|
|
|
|
|
store atomic i8 %str, i8* %0 monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align16_uint8_t_uint8_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align16_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stb r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
store atomic i8 %str, i8* inttoptr (i64 4080 to i8*) monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align32_uint8_t_uint8_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align32_uint8_t_uint8_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r4, 153
|
|
|
|
|
; CHECK-NEXT: stb r3, -27108(r4)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
store atomic i8 %str, i8* inttoptr (i64 9999900 to i8*) monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align64_uint8_t_uint8_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_cst_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stb r3, 0(r4)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_cst_align64_uint8_t_uint8_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stb r3, 0(r4)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
store atomic i8 %str, i8* inttoptr (i64 1000000000000 to i8*) monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_0_uint8_t_uint16_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_0_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: sth r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align16_uint8_t_uint16_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_align16_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: sth r4, 8(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align32_uint8_t_uint16_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align64_uint8_t_uint16_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_reg_uint8_t_uint16_t(i8* nocapture %ptr, i64 %off, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_reg_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: sthx r5, r3, r4
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_or1_uint8_t_uint16_t(i64 %ptr, i8 zeroext %off, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_or1_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: sth r5, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv1 = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv1, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint16_uint8_t_uint16_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint16_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: sth r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align16_uint8_t_uint16_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_disjoint_align16_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: sth r4, 24(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint32_uint8_t_uint16_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: sth r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align32_uint8_t_uint16_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r5, r5, 41712
|
|
|
|
|
; CHECK-P9-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: st_disjoint_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r6, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: ori r5, r6, 41712
|
|
|
|
|
; CHECK-P8-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint64_uint8_t_uint16_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_not_disjoint64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r6, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r6, r5, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r6
|
|
|
|
|
; CHECK-P10-NEXT: sth r4, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_not_disjoint64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r5, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r5, r5, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: sth r4, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align64_uint8_t_uint16_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_disjoint_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align16_uint8_t_uint16_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align16_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: sth r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align32_uint8_t_uint16_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align32_uint8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r4, 153
|
|
|
|
|
; CHECK-NEXT: sth r3, -27108(r4)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align64_uint8_t_uint16_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_cst_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: sth r3, 0(r4)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_cst_align64_uint8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: sth r3, 0(r4)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_0_uint8_t_uint32_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_0_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stw r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align16_uint8_t_uint32_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_align16_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stw r4, 8(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align32_uint8_t_uint32_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align64_uint8_t_uint32_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_reg_uint8_t_uint32_t(i8* nocapture %ptr, i64 %off, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_reg_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stwx r5, r3, r4
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_or1_uint8_t_uint32_t(i64 %ptr, i8 zeroext %off, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_or1_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: stw r5, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv1 = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv1, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint16_uint8_t_uint32_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint16_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: stw r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align16_uint8_t_uint32_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_disjoint_align16_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: stw r4, 24(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint32_uint8_t_uint32_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: stw r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align32_uint8_t_uint32_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r5, r5, 41712
|
|
|
|
|
; CHECK-P9-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: st_disjoint_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r6, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: ori r5, r6, 41712
|
|
|
|
|
; CHECK-P8-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint64_uint8_t_uint32_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_not_disjoint64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r6, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r6, r5, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r6
|
|
|
|
|
; CHECK-P10-NEXT: stw r4, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_not_disjoint64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r5, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r5, r5, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: stw r4, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align64_uint8_t_uint32_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_disjoint_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align16_uint8_t_uint32_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align16_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stw r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* inttoptr (i64 4080 to i32*) monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align32_uint8_t_uint32_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align32_uint8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r4, 153
|
|
|
|
|
; CHECK-NEXT: stw r3, -27108(r4)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* inttoptr (i64 9999900 to i32*) monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align64_uint8_t_uint32_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_cst_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stw r3, 0(r4)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_cst_align64_uint8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stw r3, 0(r4)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* inttoptr (i64 1000000000000 to i32*) monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_0_uint8_t_uint64_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_0_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: std r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align16_uint8_t_uint64_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_align16_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: std r4, 8(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align32_uint8_t_uint64_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align64_uint8_t_uint64_t(i8* nocapture %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_reg_uint8_t_uint64_t(i8* nocapture %ptr, i64 %off, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_reg_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stdx r5, r3, r4
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_or1_uint8_t_uint64_t(i64 %ptr, i8 zeroext %off, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_or1_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: std r5, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv1 = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv1, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint16_uint8_t_uint64_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint16_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: std r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align16_uint8_t_uint64_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_disjoint_align16_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: std r4, 24(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint32_uint8_t_uint64_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: std r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align32_uint8_t_uint64_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r5, r5, 41712
|
|
|
|
|
; CHECK-P9-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: st_disjoint_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r6, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: ori r5, r6, 41712
|
|
|
|
|
; CHECK-P8-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint64_uint8_t_uint64_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_not_disjoint64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r6, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r6, r5, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r6
|
|
|
|
|
; CHECK-P10-NEXT: std r4, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_not_disjoint64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r5, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r5, r5, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: std r4, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align64_uint8_t_uint64_t(i64 %ptr, i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_disjoint_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align16_uint8_t_uint64_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align16_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: std r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* inttoptr (i64 4080 to i64*) monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align32_uint8_t_uint64_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align32_uint8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r4, 153
|
|
|
|
|
; CHECK-NEXT: std r3, -27108(r4)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* inttoptr (i64 9999900 to i64*) monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align64_uint8_t_uint64_t(i8 zeroext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_cst_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: std r3, 0(r4)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_cst_align64_uint8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: std r3, 0(r4)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* inttoptr (i64 1000000000000 to i64*) monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_0_int8_t_uint16_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_0_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: sth r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align16_int8_t_uint16_t(i8* nocapture %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_align16_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: sth r4, 8(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align32_int8_t_uint16_t(i8* nocapture %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align64_int8_t_uint16_t(i8* nocapture %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_reg_int8_t_uint16_t(i8* nocapture %ptr, i64 %off, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_reg_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: sthx r5, r3, r4
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_or1_int8_t_uint16_t(i64 %ptr, i8 zeroext %off, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_or1_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: sth r5, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv1 = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv1, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint16_int8_t_uint16_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint16_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: sth r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align16_int8_t_uint16_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_disjoint_align16_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: sth r4, 24(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint32_int8_t_uint16_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint32_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: sth r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align32_int8_t_uint16_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r5, r5, 41712
|
|
|
|
|
; CHECK-P9-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: st_disjoint_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r6, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: ori r5, r6, 41712
|
|
|
|
|
; CHECK-P8-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint64_int8_t_uint16_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_not_disjoint64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r6, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r6, r5, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r6
|
|
|
|
|
; CHECK-P10-NEXT: sth r4, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_not_disjoint64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r5, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r5, r5, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: sth r4, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 2
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align64_int8_t_uint16_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_disjoint_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: sthx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i16*
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* %0 monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align16_int8_t_uint16_t(i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align16_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: sth r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* inttoptr (i64 4080 to i16*) monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align32_int8_t_uint16_t(i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align32_int8_t_uint16_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r4, 153
|
|
|
|
|
; CHECK-NEXT: sth r3, -27108(r4)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* inttoptr (i64 9999900 to i16*) monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align64_int8_t_uint16_t(i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_cst_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: sth r3, 0(r4)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_cst_align64_int8_t_uint16_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: sth r3, 0(r4)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = sext i8 %str to i16
|
|
|
|
|
store atomic i16 %conv, i16* inttoptr (i64 1000000000000 to i16*) monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_0_int8_t_uint32_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_0_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stw r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align16_int8_t_uint32_t(i8* nocapture %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_align16_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stw r4, 8(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align32_int8_t_uint32_t(i8* nocapture %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align64_int8_t_uint32_t(i8* nocapture %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_reg_int8_t_uint32_t(i8* nocapture %ptr, i64 %off, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_reg_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stwx r5, r3, r4
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_or1_int8_t_uint32_t(i64 %ptr, i8 zeroext %off, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_or1_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: stw r5, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv1 = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv1, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint16_int8_t_uint32_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint16_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: stw r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align16_int8_t_uint32_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_disjoint_align16_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: stw r4, 24(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint32_int8_t_uint32_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint32_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: stw r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align32_int8_t_uint32_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r5, r5, 41712
|
|
|
|
|
; CHECK-P9-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: st_disjoint_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r6, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: ori r5, r6, 41712
|
|
|
|
|
; CHECK-P8-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint64_int8_t_uint32_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_not_disjoint64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r6, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r6, r5, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r6
|
|
|
|
|
; CHECK-P10-NEXT: stw r4, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_not_disjoint64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r5, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r5, r5, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: stw r4, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align64_int8_t_uint32_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_disjoint_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stwx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i32*
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* %0 monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align16_int8_t_uint32_t(i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align16_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stw r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* inttoptr (i64 4080 to i32*) monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align32_int8_t_uint32_t(i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align32_int8_t_uint32_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r4, 153
|
|
|
|
|
; CHECK-NEXT: stw r3, -27108(r4)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* inttoptr (i64 9999900 to i32*) monotonic, align 4
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align64_int8_t_uint32_t(i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_cst_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stw r3, 0(r4)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_cst_align64_int8_t_uint32_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stw r3, 0(r4)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = sext i8 %str to i32
|
|
|
|
|
store atomic i32 %conv, i32* inttoptr (i64 1000000000000 to i32*) monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_0_int8_t_uint64_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_0_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: std r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%0 = inttoptr i64 %ptr to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align16_int8_t_uint64_t(i8* nocapture %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_align16_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: std r4, 8(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align32_int8_t_uint64_t(i8* nocapture %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 99999000
|
|
|
|
|
; CHECK-P10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 1525
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 56600
|
|
|
|
|
; CHECK-PREP10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 99999000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_align64_int8_t_uint64_t(i8* nocapture %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1000000000000
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_reg_int8_t_uint64_t(i8* nocapture %ptr, i64 %off, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_reg_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: stdx r5, r3, r4
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 %off
|
|
|
|
|
%0 = bitcast i8* %add.ptr to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_or1_int8_t_uint64_t(i64 %ptr, i8 zeroext %off, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_or1_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: or r3, r4, r3
|
|
|
|
|
; CHECK-NEXT: std r5, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = zext i8 %off to i64
|
|
|
|
|
%or = or i64 %conv, %ptr
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv1 = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv1, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint16_int8_t_uint64_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint16_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 6
|
|
|
|
|
; CHECK-NEXT: std r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 6
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align16_int8_t_uint64_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_disjoint_align16_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: rldicr r3, r3, 0, 51
|
|
|
|
|
; CHECK-NEXT: std r4, 24(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -4096
|
|
|
|
|
%or = or i64 %and, 24
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint32_int8_t_uint64_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_not_disjoint32_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: ori r3, r3, 34463
|
|
|
|
|
; CHECK-NEXT: oris r3, r3, 1
|
|
|
|
|
; CHECK-NEXT: std r4, 0(r3)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 99999
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align32_int8_t_uint64_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P10-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 999990000
|
|
|
|
|
; CHECK-P10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P9-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: lis r5, 15258
|
|
|
|
|
; CHECK-P9-NEXT: ori r5, r5, 41712
|
|
|
|
|
; CHECK-P9-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P9-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-P8-LABEL: st_disjoint_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P8-NEXT: lis r5, -15264
|
|
|
|
|
; CHECK-P8-NEXT: lis r6, 15258
|
|
|
|
|
; CHECK-P8-NEXT: and r3, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: ori r5, r6, 41712
|
|
|
|
|
; CHECK-P8-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P8-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1000341504
|
|
|
|
|
%or = or i64 %and, 999990000
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_not_disjoint64_int8_t_uint64_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_not_disjoint64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 232
|
|
|
|
|
; CHECK-P10-NEXT: pli r6, 3567587329
|
|
|
|
|
; CHECK-P10-NEXT: rldimi r6, r5, 32, 0
|
|
|
|
|
; CHECK-P10-NEXT: or r3, r3, r6
|
|
|
|
|
; CHECK-P10-NEXT: std r4, 0(r3)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_not_disjoint64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: li r5, 29
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 35, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: oris r5, r5, 54437
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 4097
|
|
|
|
|
; CHECK-PREP10-NEXT: or r3, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: std r4, 0(r3)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%or = or i64 %ptr, 1000000000001
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_disjoint_align64_int8_t_uint64_t(i64 %ptr, i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_disjoint_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r5, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-P10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_disjoint_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r5, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 23
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r5, r5, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r5, r5, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: stdx r4, r3, r5
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%and = and i64 %ptr, -1099511627776
|
|
|
|
|
%or = or i64 %and, 1000000000000
|
|
|
|
|
%0 = inttoptr i64 %or to i64*
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* %0 monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align16_int8_t_uint64_t(i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align16_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: std r3, 4080(0)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* inttoptr (i64 4080 to i64*) monotonic, align 16
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align32_int8_t_uint64_t(i8 signext %str) {
|
|
|
|
|
; CHECK-LABEL: st_cst_align32_int8_t_uint64_t:
|
|
|
|
|
; CHECK: # %bb.0: # %entry
|
|
|
|
|
; CHECK-NEXT: lis r4, 153
|
|
|
|
|
; CHECK-NEXT: std r3, -27108(r4)
|
|
|
|
|
; CHECK-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* inttoptr (i64 9999900 to i64*) monotonic, align 8
|
|
|
|
|
ret void
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
; Function Attrs: nofree norecurse nounwind uwtable willreturn
|
|
|
|
|
define dso_local void @st_cst_align64_int8_t_uint64_t(i8 signext %str) {
|
|
|
|
|
; CHECK-P10-LABEL: st_cst_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-P10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-P10-NEXT: pli r4, 244140625
|
|
|
|
|
; CHECK-P10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-P10-NEXT: std r3, 0(r4)
|
|
|
|
|
; CHECK-P10-NEXT: blr
|
|
|
|
|
;
|
|
|
|
|
; CHECK-PREP10-LABEL: st_cst_align64_int8_t_uint64_t:
|
|
|
|
|
; CHECK-PREP10: # %bb.0: # %entry
|
|
|
|
|
; CHECK-PREP10-NEXT: lis r4, 3725
|
|
|
|
|
; CHECK-PREP10-NEXT: ori r4, r4, 19025
|
|
|
|
|
; CHECK-PREP10-NEXT: rldic r4, r4, 12, 24
|
|
|
|
|
; CHECK-PREP10-NEXT: std r3, 0(r4)
|
|
|
|
|
; CHECK-PREP10-NEXT: blr
|
|
|
|
|
entry:
|
|
|
|
|
%conv = sext i8 %str to i64
|
|
|
|
|
store atomic i64 %conv, i64* inttoptr (i64 1000000000000 to i64*) monotonic, align 4096
|
|
|
|
|
ret void
|
|
|
|
|
}
|
