llvm-mirror/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt

# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}

# Opcode=871 Name=VLD3DUPd32_UPD Format=ARM_FORMAT_NLdSt(30)
#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 1| 0: 1: 0: 0| 1: 0: 1: 0| 0: 0: 1: 0| 0: 0: 1: 0| 1: 1: 1: 0| 1: 0: 0: 1| 0: 0: 1: 0|
# -------------------------------------------------------------------------------------------------
#
# A8.6.315 VLD3 (single 3-element structure to all lanes)
# The a bit must be encoded as 0.
0xa2 0xf9 0x92 0x2e
A8.6.315 VLD3 (single 3-element structure to all lanes) The a bit must be encoded as 0. rdar://problem/9292625 llvm-svn: 129618 2011-04-16 00:49:08 +02:00			`# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 \|& grep {invalid instruction encoding}`

			`# Opcode=871 Name=VLD3DUPd32_UPD Format=ARM_FORMAT_NLdSt(30)`
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. llvm-svn: 137144 2011-08-09 22:55:18 +02:00			`# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0`
A8.6.315 VLD3 (single 3-element structure to all lanes) The a bit must be encoded as 0. rdar://problem/9292625 llvm-svn: 129618 2011-04-16 00:49:08 +02:00			`# -------------------------------------------------------------------------------------------------`
			`# \| 1: 1: 1: 1\| 0: 1: 0: 0\| 1: 0: 1: 0\| 0: 0: 1: 0\| 0: 0: 1: 0\| 1: 1: 1: 0\| 1: 0: 0: 1\| 0: 0: 1: 0\|`
			`# -------------------------------------------------------------------------------------------------`
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter. This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. llvm-svn: 137144 2011-08-09 22:55:18 +02:00			`#`
A8.6.315 VLD3 (single 3-element structure to all lanes) The a bit must be encoded as 0. rdar://problem/9292625 llvm-svn: 129618 2011-04-16 00:49:08 +02:00			`# A8.6.315 VLD3 (single 3-element structure to all lanes)`
			`# The a bit must be encoded as 0.`
			`0xa2 0xf9 0x92 0x2e`