RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-01 00:12:50 +01:00
Code Issues Projects Releases Wiki Activity
68623fbfd7
llvm-mirror/test/CodeGen/X86/win64_alloca_dynalloca.ll

75 lines
1.7 KiB
LLVM
Raw Normal View History

Remove -join-physregs from the test suite. This option has been disabled for a while, and it is going away so I can clean up the coalescer code. The tests that required physreg joining to be enabled were almost all of the form "tiny function with interference between arguments and return value". Such functions are usually inlined in the real world. The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly rare. llvm-svn: 157027
2012-05-18 01:44:19 +02:00
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-mingw32 | FileCheck %s -check-prefix=M64
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-win32 | FileCheck %s -check-prefix=W64
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-win32-macho | FileCheck %s -check-prefix=EFI
Target/X86: [PR8777][PR8778] Tweak alloca/chkstk for Windows targets. FIXME: Some cleanups would be needed. llvm-svn: 128206
2011-03-24 08:07:00 +01:00
; PR8777
; PR8778
define i64 @foo(i64 %n, i64 %x) nounwind {
entry:
%buf0 = alloca i8, i64 4096, align 1
; ___chkstk must adjust %rsp.
; M64: movq %rsp, %rbp
; M64: $4096, %rax
; M64: callq ___chkstk
; M64-NOT: %rsp
; __chkstk does not adjust %rsp.
; W64: movq %rsp, %rbp
; W64: $4096, %rax
; W64: callq __chkstk
; W64: subq $4096, %rsp
; Freestanding
; EFI: movq %rsp, %rbp
; EFI: $[[B0OFS:4096|4104]], %rsp
; EFI-NOT: call
%buf1 = alloca i8, i64 %n, align 1
Remove -join-physregs from the test suite. This option has been disabled for a while, and it is going away so I can clean up the coalescer code. The tests that required physreg joining to be enabled were almost all of the form "tiny function with interference between arguments and return value". Such functions are usually inlined in the real world. The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly rare. llvm-svn: 157027
2012-05-18 01:44:19 +02:00
; M64: leaq 15(%{{.*}}), %rax
Target/X86: [PR8777][PR8778] Tweak alloca/chkstk for Windows targets. FIXME: Some cleanups would be needed. llvm-svn: 128206
2011-03-24 08:07:00 +01:00
; M64: andq $-16, %rax
; M64: callq ___chkstk
; M64-NOT: %rsp
; M64: movq %rsp, %rax
Remove -join-physregs from the test suite. This option has been disabled for a while, and it is going away so I can clean up the coalescer code. The tests that required physreg joining to be enabled were almost all of the form "tiny function with interference between arguments and return value". Such functions are usually inlined in the real world. The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly rare. llvm-svn: 157027
2012-05-18 01:44:19 +02:00
; W64: leaq 15(%{{.*}}), %rax
Target/X86: [PR8777][PR8778] Tweak alloca/chkstk for Windows targets. FIXME: Some cleanups would be needed. llvm-svn: 128206
2011-03-24 08:07:00 +01:00
; W64: andq $-16, %rax
; W64: callq __chkstk
; W64: subq %rax, %rsp
; W64: movq %rsp, %rax
Remove -join-physregs from the test suite. This option has been disabled for a while, and it is going away so I can clean up the coalescer code. The tests that required physreg joining to be enabled were almost all of the form "tiny function with interference between arguments and return value". Such functions are usually inlined in the real world. The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly rare. llvm-svn: 157027
2012-05-18 01:44:19 +02:00
; EFI: leaq 15(%{{.*}}), [[R1:%r.*]]
Fix register-dependent X86 tests. llvm-svn: 128867
2011-04-05 02:32:44 +02:00
; EFI: andq $-16, [[R1]]
Fix some tests that depend on register allocation. llvm-svn: 132602
2011-06-04 00:45:21 +02:00
; EFI: movq %rsp, [[R64:%r.*]]
Fix register-dependent X86 tests. llvm-svn: 128867
2011-04-05 02:32:44 +02:00
; EFI: subq [[R1]], [[R64]]
Target/X86: [PR8777][PR8778] Tweak alloca/chkstk for Windows targets. FIXME: Some cleanups would be needed. llvm-svn: 128206
2011-03-24 08:07:00 +01:00
; EFI: movq [[R64]], %rsp
%r = call i64 @bar(i64 %n, i64 %x, i64 %n, i8* %buf0, i8* %buf1) nounwind
; M64: subq $48, %rsp
; M64: leaq -4096(%rbp), %r9
; M64: movq %rax, 32(%rsp)
; M64: callq bar
; W64: subq $48, %rsp
; W64: leaq -4096(%rbp), %r9
; W64: movq %rax, 32(%rsp)
; W64: callq bar
; EFI: subq $48, %rsp
; EFI: leaq -[[B0OFS]](%rbp), %r9
; EFI: movq [[R64]], 32(%rsp)
; EFI: callq _bar
ret i64 %r
; M64: movq %rbp, %rsp
; W64: movq %rbp, %rsp
}
declare i64 @bar(i64, i64, i64, i8* nocapture, i8* nocapture) nounwind
Reference in New Issue Copy Permalink