llvm-mirror/test/MC/ARM/neont2-convert-encoding.s

@ RUN: llvm-mc -mcpu=cortex-a9 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s

.code 16

@ CHECK: vcvt.s32.f32	d16, d16        @ encoding: [0xfb,0xff,0x20,0x07]
	vcvt.s32.f32	d16, d16
@ CHECK: vcvt.u32.f32	d16, d16        @ encoding: [0xfb,0xff,0xa0,0x07]
	vcvt.u32.f32	d16, d16
@ CHECK: vcvt.f32.s32	d16, d16        @ encoding: [0xfb,0xff,0x20,0x06]
	vcvt.f32.s32	d16, d16
@ CHECK: vcvt.f32.u32	d16, d16        @ encoding: [0xfb,0xff,0xa0,0x06]
	vcvt.f32.u32	d16, d16
@ CHECK: vcvt.s32.f32	q8, q8          @ encoding: [0xfb,0xff,0x60,0x07]
	vcvt.s32.f32	q8, q8
@ CHECK: vcvt.u32.f32	q8, q8          @ encoding: [0xfb,0xff,0xe0,0x07]
	vcvt.u32.f32	q8, q8
@ CHECK: vcvt.f32.s32	q8, q8          @ encoding: [0xfb,0xff,0x60,0x06]
	vcvt.f32.s32	q8, q8
@ CHECK: vcvt.f32.u32	q8, q8          @ encoding: [0xfb,0xff,0xe0,0x06]
	vcvt.f32.u32	q8, q8
@ CHECK: vcvt.s32.f32	d16, d16, #1    @ encoding: [0xff,0xef,0x30,0x0f]
	vcvt.s32.f32	d16, d16, #1
@ CHECK: vcvt.u32.f32	d16, d16, #1    @ encoding: [0xff,0xff,0x30,0x0f]
	vcvt.u32.f32	d16, d16, #1
@ CHECK: vcvt.f32.s32	d16, d16, #1    @ encoding: [0xff,0xef,0x30,0x0e]
	vcvt.f32.s32	d16, d16, #1
@ CHECK: vcvt.f32.u32	d16, d16, #1    @ encoding: [0xff,0xff,0x30,0x0e]
	vcvt.f32.u32	d16, d16, #1
@ CHECK: vcvt.s32.f32	q8, q8, #1      @ encoding: [0xff,0xef,0x70,0x0f]
	vcvt.s32.f32	q8, q8, #1
@ CHECK: vcvt.u32.f32	q8, q8, #1      @ encoding: [0xff,0xff,0x70,0x0f]
	vcvt.u32.f32	q8, q8, #1
@ CHECK: vcvt.f32.s32	q8, q8, #1      @ encoding: [0xff,0xef,0x70,0x0e]
	vcvt.f32.s32	q8, q8, #1
@ CHECK: vcvt.f32.u32	q8, q8, #1      @ encoding: [0xff,0xff,0x70,0x0e]
	vcvt.f32.u32	q8, q8, #1
@ CHECK: vcvt.f32.f16	q8, d16         @ encoding: [0xf6,0xff,0x20,0x07]
	vcvt.f32.f16	q8, d16
@ CHECK: vcvt.f16.f32	d16, q8         @ encoding: [0xf6,0xff,0x20,0x06]
	vcvt.f16.f32	d16, q8
Add Neon VCVT instructions for f32 <-> f16 conversions. Clang is now providing intrinsics for these and so we need to support them in the backend. Radar 8068427. llvm-svn: 121902 2010-12-15 23:14:12 +01:00			`@ RUN: llvm-mc -mcpu=cortex-a9 -triple thumb-unknown-unknown -show-encoding < %s \| FileCheck %s`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00
			`.code 16`

Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.s32.f32 d16, d16`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x07]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.u32.f32 d16, d16`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.f32.s32 d16, d16`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x06]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.f32.u32 d16, d16`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.s32.f32 q8, q8`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.u32.f32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x07]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.u32.f32 q8, q8`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.f32.s32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x06]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.f32.s32 q8, q8`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.f32.u32 q8, q8 @ encoding: [0xfb,0xff,0xe0,0x06]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.f32.u32 q8, q8`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.s32.f32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0f]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.s32.f32 d16, d16, #1`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.u32.f32 d16, d16, #1 @ encoding: [0xff,0xff,0x30,0x0f]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.u32.f32 d16, d16, #1`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.f32.s32 d16, d16, #1 @ encoding: [0xff,0xef,0x30,0x0e]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.f32.s32 d16, d16, #1`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.f32.u32 d16, d16, #1 @ encoding: [0xff,0xff,0x30,0x0e]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.f32.u32 d16, d16, #1`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.s32.f32 q8, q8, #1 @ encoding: [0xff,0xef,0x70,0x0f]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.s32.f32 q8, q8, #1`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.u32.f32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0f]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.u32.f32 q8, q8, #1`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.f32.s32 q8, q8, #1 @ encoding: [0xff,0xef,0x70,0x0e]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.f32.s32 q8, q8, #1`
Encode the 32-bit wide Thumb (and Thumb2) instructions with the high order halfword being emitted to the stream first. rdar://8728174 llvm-svn: 120848 2010-12-03 23:31:40 +01:00			`@ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0e]`
Fill out support for Thumb2 encodings of NEON instructions. llvm-svn: 118854 2010-11-12 00:12:55 +01:00			`vcvt.f32.u32 q8, q8, #1`
Add Neon VCVT instructions for f32 <-> f16 conversions. Clang is now providing intrinsics for these and so we need to support them in the backend. Radar 8068427. llvm-svn: 121902 2010-12-15 23:14:12 +01:00			`@ CHECK: vcvt.f32.f16 q8, d16 @ encoding: [0xf6,0xff,0x20,0x07]`
			`vcvt.f32.f16 q8, d16`
			`@ CHECK: vcvt.f16.f32 d16, q8 @ encoding: [0xf6,0xff,0x20,0x06]`
			`vcvt.f16.f32 d16, q8`