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57 lines
2.1 KiB
C++
57 lines
2.1 KiB
C++
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//===- KnownBitsTest.cpp -------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "GISelMITest.h"
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#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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TEST_F(GISelMITest, TestKnownBitsCst) {
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StringRef MIRString = " %3:_(s8) = G_CONSTANT i8 1\n"
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" %4:_(s8) = COPY %3\n";
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setUp(MIRString);
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if (!TM)
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return;
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unsigned CopyReg = Copies[Copies.size() - 1];
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MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
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unsigned SrcReg = FinalCopy->getOperand(1).getReg();
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GISelKnownBits Info(*MF);
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KnownBits Res = Info.getKnownBits(SrcReg);
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EXPECT_EQ((uint64_t)1, Res.One.getZExtValue());
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EXPECT_EQ((uint64_t)0xfe, Res.Zero.getZExtValue());
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}
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TEST_F(GISelMITest, TestKnownBits) {
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StringRef MIR = " %3:_(s32) = G_TRUNC %0\n"
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" %4:_(s32) = G_TRUNC %1\n"
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" %5:_(s32) = G_CONSTANT i32 5\n"
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" %6:_(s32) = G_CONSTANT i32 24\n"
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" %7:_(s32) = G_CONSTANT i32 28\n"
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" %14:_(p0) = G_INTTOPTR %7\n"
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" %16:_(s32) = G_PTRTOINT %14\n"
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" %8:_(s32) = G_SHL %3, %5\n"
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" %9:_(s32) = G_SHL %4, %5\n"
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" %10:_(s32) = G_OR %8, %6\n"
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" %11:_(s32) = G_OR %9, %16\n"
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" %12:_(s32) = G_MUL %10, %11\n"
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" %13:_(s32) = COPY %12\n";
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setUp(MIR);
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if (!TM)
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return;
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unsigned CopyReg = Copies[Copies.size() - 1];
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MachineInstr *FinalCopy = MRI->getVRegDef(CopyReg);
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unsigned SrcReg = FinalCopy->getOperand(1).getReg();
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GISelKnownBits Info(*MF);
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KnownBits Known = Info.getKnownBits(SrcReg);
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EXPECT_FALSE(Known.hasConflict());
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EXPECT_EQ(0u, Known.One.getZExtValue());
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EXPECT_EQ(31u, Known.Zero.getZExtValue());
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APInt Zeroes = Info.getKnownZeroes(SrcReg);
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EXPECT_EQ(Known.Zero, Zeroes);
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}
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