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llvm-mirror/test/Analysis/CostModel/RISCV/reduce-or.ll

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[Cost]Add tests for boolean and/or reductions, NFC. Tests with the default costs for boolean and/or reductions. Differential Revision: https://reviews.llvm.org/D97793
2021-03-02 11:30:52 -08:00
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
[Cost]Canonicalize the cost for logical or/and reductions. The generic cost of logical or/and reductions should be cost of bitcast <ReduxWidth x i1> to iReduxWidth + cmp eq|ne iReduxWidth. Differential Revision: https://reviews.llvm.org/D97961
2021-03-02 10:53:49 -08:00
; RUN: opt < %s -mtriple=riscv32 -cost-model -cost-kind=throughput -analyze | FileCheck %s --check-prefix=RISCV32
; RUN: opt < %s -mtriple=riscv64 -cost-model -cost-kind=throughput -analyze | FileCheck %s --check-prefix=RISCV64
[Cost]Add tests for boolean and/or reductions, NFC. Tests with the default costs for boolean and/or reductions. Differential Revision: https://reviews.llvm.org/D97793
2021-03-02 11:30:52 -08:00
define i32 @reduce_i1(i32 %arg) {
[Cost]Canonicalize the cost for logical or/and reductions. The generic cost of logical or/and reductions should be cost of bitcast <ReduxWidth x i1> to iReduxWidth + cmp eq|ne iReduxWidth. Differential Revision: https://reviews.llvm.org/D97961
2021-03-02 10:53:49 -08:00
; RISCV32-LABEL: 'reduce_i1'
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V1 = call i1 @llvm.vector.reduce.or.v1i1(<1 x i1> undef)
; RISCV32-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2 = call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> undef)
; RISCV32-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V4 = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> undef)
; RISCV32-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V8 = call i1 @llvm.vector.reduce.or.v8i1(<8 x i1> undef)
; RISCV32-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %V16 = call i1 @llvm.vector.reduce.or.v16i1(<16 x i1> undef)
; RISCV32-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %V32 = call i1 @llvm.vector.reduce.or.v32i1(<32 x i1> undef)
; RISCV32-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %V64 = call i1 @llvm.vector.reduce.or.v64i1(<64 x i1> undef)
; RISCV32-NEXT: Cost Model: Found an estimated cost of 132 for instruction: %V128 = call i1 @llvm.vector.reduce.or.v128i1(<128 x i1> undef)
; RISCV32-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
;
; RISCV64-LABEL: 'reduce_i1'
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V1 = call i1 @llvm.vector.reduce.or.v1i1(<1 x i1> undef)
; RISCV64-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2 = call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> undef)
; RISCV64-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V4 = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> undef)
; RISCV64-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V8 = call i1 @llvm.vector.reduce.or.v8i1(<8 x i1> undef)
; RISCV64-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %V16 = call i1 @llvm.vector.reduce.or.v16i1(<16 x i1> undef)
; RISCV64-NEXT: Cost Model: Found an estimated cost of 33 for instruction: %V32 = call i1 @llvm.vector.reduce.or.v32i1(<32 x i1> undef)
; RISCV64-NEXT: Cost Model: Found an estimated cost of 65 for instruction: %V64 = call i1 @llvm.vector.reduce.or.v64i1(<64 x i1> undef)
; RISCV64-NEXT: Cost Model: Found an estimated cost of 130 for instruction: %V128 = call i1 @llvm.vector.reduce.or.v128i1(<128 x i1> undef)
; RISCV64-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
[Cost]Add tests for boolean and/or reductions, NFC. Tests with the default costs for boolean and/or reductions. Differential Revision: https://reviews.llvm.org/D97793
2021-03-02 11:30:52 -08:00
;
%V1 = call i1 @llvm.vector.reduce.or.v1i1(<1 x i1> undef)
%V2 = call i1 @llvm.vector.reduce.or.v2i1(<2 x i1> undef)
%V4 = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> undef)
%V8 = call i1 @llvm.vector.reduce.or.v8i1(<8 x i1> undef)
%V16 = call i1 @llvm.vector.reduce.or.v16i1(<16 x i1> undef)
%V32 = call i1 @llvm.vector.reduce.or.v32i1(<32 x i1> undef)
%V64 = call i1 @llvm.vector.reduce.or.v64i1(<64 x i1> undef)
%V128 = call i1 @llvm.vector.reduce.or.v128i1(<128 x i1> undef)
ret i32 undef
}
declare i1 @llvm.vector.reduce.or.v1i1(<1 x i1>)
declare i1 @llvm.vector.reduce.or.v2i1(<2 x i1>)
declare i1 @llvm.vector.reduce.or.v4i1(<4 x i1>)
declare i1 @llvm.vector.reduce.or.v8i1(<8 x i1>)
declare i1 @llvm.vector.reduce.or.v16i1(<16 x i1>)
declare i1 @llvm.vector.reduce.or.v32i1(<32 x i1>)
declare i1 @llvm.vector.reduce.or.v64i1(<64 x i1>)
declare i1 @llvm.vector.reduce.or.v128i1(<128 x i1>)
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