2018-11-02 02:31:52 +01:00
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# RUN: llc -o - %s -start-after=patchable-function -O0 | FileCheck %s
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# Generated from the source file pr19307.cc:
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# #include <string>
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# void parse_range(unsigned long long &offset, unsigned long long &limit,
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# std::string range) {
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# if (range.compare(0, 6, "items=") != 0 || range[6] == '-')
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# offset = 1;
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# range.erase(0, 6);
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# limit = 2;
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# }
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# with "clang++ -S -emit-llvm -O0 -g pr19307.cc"
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#
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# Location of "range" string is spilled from %rdx to stack and is
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# addressed via %rbp.
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# CHECK: movq %rdx, {{[-0-9]+}}(%rbp)
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# CHECK-NEXT: [[START_LABEL:.Ltmp[0-9]+]]:
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# This location should be valid until the end of the function.
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#
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# Verify that we have proper range in debug_loc section:
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# CHECK: .Ldebug_loc{{[0-9]+}}:
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# CHECK: DW_OP_breg1
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# CHECK: .quad [[START_LABEL]]-.Lfunc_begin0
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# CHECK-NEXT: .quad .Lfunc_end0-.Lfunc_begin0
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# CHECK: DW_OP_breg6
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# CHECK: DW_OP_deref
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--- |
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target triple = "x86_64-unknown-linux-gnu"
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%"class.std::basic_string" = type { %"struct.std::basic_string<char, std::char_traits<char>, std::allocator<char> >::_Alloc_hider" }
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%"struct.std::basic_string<char, std::char_traits<char>, std::allocator<char> >::_Alloc_hider" = type { i8* }
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@.str = private unnamed_addr constant [7 x i8] c"items=\00", align 1
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; Function Attrs: uwtable
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define void @_Z11parse_rangeRyS_Ss(i64* %offset, i64* %limit, %"class.std::basic_string"* %range) #0 !dbg !34 {
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entry:
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%offset.addr = alloca i64*, align 8
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%limit.addr = alloca i64*, align 8
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store i64* %offset, i64** %offset.addr, align 8
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call void @llvm.dbg.declare(metadata i64** %offset.addr, metadata !41, metadata !DIExpression()), !dbg !42
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store i64* %limit, i64** %limit.addr, align 8
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call void @llvm.dbg.declare(metadata i64** %limit.addr, metadata !43, metadata !DIExpression()), !dbg !42
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call void @llvm.dbg.declare(metadata %"class.std::basic_string"* %range, metadata !44, metadata !DIExpression(DW_OP_deref)), !dbg !45
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%call = call i32 @_ZNKSs7compareEmmPKc(%"class.std::basic_string"* %range, i64 0, i64 6, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i32 0, i32 0)), !dbg !46
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%cmp = icmp ne i32 %call, 0, !dbg !46
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br i1 %cmp, label %if.then, label %lor.lhs.false, !dbg !46
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lor.lhs.false: ; preds = %entry
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%call1 = call i8* @_ZNSsixEm(%"class.std::basic_string"* %range, i64 6), !dbg !48
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%0 = load i8, i8* %call1, !dbg !48
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%conv = sext i8 %0 to i32, !dbg !48
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%cmp2 = icmp eq i32 %conv, 45, !dbg !48
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br i1 %cmp2, label %if.then, label %if.end, !dbg !48
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if.then: ; preds = %lor.lhs.false, %entry
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%1 = load i64*, i64** %offset.addr, align 8, !dbg !50
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store i64 1, i64* %1, align 8, !dbg !50
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br label %if.end, !dbg !50
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if.end: ; preds = %if.then, %lor.lhs.false
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%call3 = call %"class.std::basic_string"* @_ZNSs5eraseEmm(%"class.std::basic_string"* %range, i64 0, i64 6), !dbg !51
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%2 = load i64*, i64** %limit.addr, align 8, !dbg !52
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store i64 2, i64* %2, align 8, !dbg !52
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ret void, !dbg !53
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}
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; Function Attrs: nounwind readnone speculatable
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declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
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declare i32 @_ZNKSs7compareEmmPKc(%"class.std::basic_string"*, i64, i64, i8*) #2
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declare i8* @_ZNSsixEm(%"class.std::basic_string"*, i64) #2
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declare %"class.std::basic_string"* @_ZNSs5eraseEmm(%"class.std::basic_string"*, i64, i64) #2
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; Function Attrs: nounwind
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declare void @llvm.stackprotector(i8*, i8**) #3
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2019-12-25 00:52:21 +01:00
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attributes #0 = { uwtable "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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2018-11-02 02:31:52 +01:00
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attributes #1 = { nounwind readnone speculatable }
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2019-12-25 00:52:21 +01:00
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attributes #2 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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2018-11-02 02:31:52 +01:00
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attributes #3 = { nounwind }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!31, !32}
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!llvm.ident = !{!33}
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!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 3.5.0 (209308)", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, globals: !2, imports: !11)
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!1 = !DIFile(filename: "pr19307.cc", directory: "/llvm_cmake_gcc")
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!2 = !{}
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!3 = !{!4, !6, !8}
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!4 = !DICompositeType(tag: DW_TAG_structure_type, file: !5, line: 83, flags: DIFlagFwdDecl, identifier: "_ZTS11__mbstate_t")
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!5 = !DIFile(filename: "/usr/include/wchar.h", directory: "/llvm_cmake_gcc")
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!6 = !DICompositeType(tag: DW_TAG_structure_type, name: "lconv", file: !7, line: 54, flags: DIFlagFwdDecl, identifier: "_ZTS5lconv")
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!7 = !DIFile(filename: "/usr/include/locale.h", directory: "/llvm_cmake_gcc")
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!8 = !DICompositeType(tag: DW_TAG_class_type, name: "basic_string<char, std::char_traits<char>, std::allocator<char> >", scope: !10, file: !9, line: 1134, flags: DIFlagFwdDecl, identifier: "_ZTSSs")
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!9 = !DIFile(filename: "/usr/lib/gcc/x86_64-linux-gnu/4.6/../../../../include/c++/4.6/bits/basic_string.tcc", directory: "/llvm_cmake_gcc")
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!10 = !DINamespace(name: "std", scope: null)
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!11 = !{!12, !15, !18, !22, !27, !30}
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!12 = !DIImportedEntity(tag: DW_TAG_imported_module, scope: !13, entity: !14, file: !1, line: 57)
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!13 = !DINamespace(name: "__gnu_debug", scope: null)
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!14 = !DINamespace(name: "__debug", scope: !10)
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!15 = !DIImportedEntity(tag: DW_TAG_imported_declaration, scope: !10, entity: !16, file: !1, line: 66)
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!16 = !DIDerivedType(tag: DW_TAG_typedef, name: "mbstate_t", file: !5, line: 106, baseType: !17)
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!17 = !DIDerivedType(tag: DW_TAG_typedef, name: "__mbstate_t", file: !5, line: 95, baseType: !4)
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!18 = !DIImportedEntity(tag: DW_TAG_imported_declaration, scope: !10, entity: !19, file: !1, line: 141)
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!19 = !DIDerivedType(tag: DW_TAG_typedef, name: "wint_t", file: !20, line: 141, baseType: !21)
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!20 = !DIFile(filename: "/llvm_cmake_gcc/bin/../lib/clang/3.5.0/include/stddef.h", directory: "/llvm_cmake_gcc")
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!21 = !DIBasicType(name: "unsigned int", size: 32, align: 32, encoding: DW_ATE_unsigned)
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!22 = !DIImportedEntity(tag: DW_TAG_imported_declaration, scope: !23, entity: !24, file: !1, line: 42)
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!23 = !DINamespace(name: "__gnu_cxx", scope: null)
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!24 = !DIDerivedType(tag: DW_TAG_typedef, name: "size_t", scope: !10, file: !25, line: 155, baseType: !26)
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!25 = !DIFile(filename: "/usr/lib/gcc/x86_64-linux-gnu/4.6/../../../../include/c++/4.6/x86_64-linux-gnu/bits/c++config.h", directory: "/llvm_cmake_gcc")
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!26 = !DIBasicType(name: "long unsigned int", size: 64, align: 64, encoding: DW_ATE_unsigned)
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!27 = !DIImportedEntity(tag: DW_TAG_imported_declaration, scope: !23, entity: !28, file: !1, line: 43)
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!28 = !DIDerivedType(tag: DW_TAG_typedef, name: "ptrdiff_t", scope: !10, file: !25, line: 156, baseType: !29)
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!29 = !DIBasicType(name: "long int", size: 64, align: 64, encoding: DW_ATE_signed)
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!30 = !DIImportedEntity(tag: DW_TAG_imported_declaration, scope: !10, entity: !6, file: !1, line: 55)
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!31 = !{i32 2, !"Dwarf Version", i32 4}
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!32 = !{i32 2, !"Debug Info Version", i32 3}
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!33 = !{!"clang version 3.5.0 (209308)"}
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!34 = distinct !DISubprogram(name: "parse_range", linkageName: "_Z11parse_rangeRyS_Ss", scope: !1, file: !1, line: 3, type: !35, isLocal: false, isDefinition: true, scopeLine: 4, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: false, unit: !0, retainedNodes: !2)
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!35 = !DISubroutineType(types: !36)
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!36 = !{null, !37, !37, !39}
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!37 = !DIDerivedType(tag: DW_TAG_reference_type, baseType: !38)
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!38 = !DIBasicType(name: "long long unsigned int", size: 64, align: 64, encoding: DW_ATE_unsigned)
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!39 = !DIDerivedType(tag: DW_TAG_typedef, name: "string", scope: !10, file: !40, line: 65, baseType: !8)
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!40 = !DIFile(filename: "/usr/lib/gcc/x86_64-linux-gnu/4.6/../../../../include/c++/4.6/bits/stringfwd.h", directory: "/llvm_cmake_gcc")
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!41 = !DILocalVariable(name: "offset", arg: 1, scope: !34, file: !1, line: 3, type: !37)
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!42 = !DILocation(line: 3, scope: !34)
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!43 = !DILocalVariable(name: "limit", arg: 2, scope: !34, file: !1, line: 3, type: !37)
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!44 = !DILocalVariable(name: "range", arg: 3, scope: !34, file: !1, line: 4, type: !39)
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!45 = !DILocation(line: 4, scope: !34)
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!46 = !DILocation(line: 5, scope: !47)
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!47 = distinct !DILexicalBlock(scope: !34, file: !1, line: 5)
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!48 = !DILocation(line: 5, scope: !49)
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!49 = distinct !DILexicalBlock(scope: !47, file: !1, line: 5)
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!50 = !DILocation(line: 6, scope: !47)
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!51 = !DILocation(line: 7, scope: !34)
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!52 = !DILocation(line: 8, scope: !34)
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!53 = !DILocation(line: 9, scope: !34)
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...
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---
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name: _Z11parse_rangeRyS_Ss
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[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
Summary:
This catches malformed mir files which specify alignment as log2 instead of pow2.
See https://reviews.llvm.org/D65945 for reference,
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: MatzeB, qcolombet, dschuff, arsenm, sdardis, nemanjai, jvesely, nhaehnle, hiraditya, kbarton, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67433
llvm-svn: 371608
2019-09-11 13:16:48 +02:00
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alignment: 16
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2018-11-02 02:31:52 +01:00
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tracksRegLiveness: true
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liveins:
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- { reg: '$rdi' }
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- { reg: '$rsi' }
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- { reg: '$rdx' }
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frameInfo:
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stackSize: 40
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offsetAdjustment: -32
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maxAlignment: 8
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adjustsStack: true
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hasCalls: true
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maxCallFrameSize: 0
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fixedStack:
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2019-06-17 11:13:29 +02:00
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- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default }
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2018-11-02 02:31:52 +01:00
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stack:
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2019-06-17 11:13:29 +02:00
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- { id: 0, name: offset.addr, offset: -24, size: 8, alignment: 8, stack-id: default,
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2018-11-02 02:31:52 +01:00
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debug-info-variable: '!41', debug-info-expression: '!DIExpression()',
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debug-info-location: '!42' }
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2019-06-17 11:13:29 +02:00
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- { id: 1, name: limit.addr, offset: -32, size: 8, alignment: 8, stack-id: default,
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2018-11-02 02:31:52 +01:00
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debug-info-variable: '!43', debug-info-expression: '!DIExpression()',
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debug-info-location: '!42' }
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2019-06-17 11:13:29 +02:00
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- { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: default }
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- { id: 3, type: spill-slot, offset: -48, size: 8, alignment: 8, stack-id: default }
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2018-11-02 02:31:52 +01:00
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body: |
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bb.0.entry:
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liveins: $rdi, $rsi, $rdx
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frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
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CFI_INSTRUCTION def_cfa_offset 16
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CFI_INSTRUCTION offset $rbp, -16
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$rbp = frame-setup MOV64rr $rsp
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CFI_INSTRUCTION def_cfa_register $rbp
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$rsp = frame-setup SUB64ri8 $rsp, 32, implicit-def dead $eflags
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$eax = XOR32rr undef $eax, undef $eax, implicit-def $eflags, implicit-def $rax
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MOV64mr $rbp, 1, $noreg, -8, $noreg, killed renamable $rdi :: (store 8 into %ir.offset.addr)
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MOV64mr $rbp, 1, $noreg, -16, $noreg, killed renamable $rsi :: (store 8 into %ir.limit.addr)
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DBG_VALUE renamable $rdx, 0, !44, !DIExpression(DW_OP_deref), debug-location !45
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$rdi = MOV64rr $rdx, debug-location !46
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$rsi = MOV64rr killed $rax, debug-location !46
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$eax = MOV32ri 6, implicit-def $rax, debug-location !46
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MOV64mr $rbp, 1, $noreg, -24, $noreg, killed $rdx :: (store 8 into %stack.2)
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DBG_VALUE $rbp, 0, !44, !DIExpression(DW_OP_constu, 24, DW_OP_minus, DW_OP_deref, DW_OP_deref), debug-location !45
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$rdx = MOV64rr killed $rax, debug-location !46
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renamable $rcx = MOV64ri @.str, debug-location !46
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CALL64pcrel32 @_ZNKSs7compareEmmPKc, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit killed $rsi, implicit killed $rdx, implicit killed $rcx, implicit-def $eax, debug-location !46
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CMP32ri8 killed renamable $eax, 0, implicit-def $eflags, debug-location !46
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[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.
Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.
Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon
Reviewed By: RKSimon
Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60228
llvm-svn: 357802
2019-04-05 21:28:09 +02:00
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JCC_1 %bb.2, 5, implicit $eflags, debug-location !46
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2018-11-02 02:31:52 +01:00
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bb.1.lor.lhs.false:
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DBG_VALUE $rbp, 0, !44, !DIExpression(DW_OP_constu, 24, DW_OP_minus, DW_OP_deref, DW_OP_deref), debug-location !45
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$rdi = MOV64rm $rbp, 1, $noreg, -24, $noreg :: (load 8 from %stack.2)
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$esi = MOV32ri 6, implicit-def $rsi, debug-location !48
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CALL64pcrel32 @_ZNSsixEm, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit killed $rsi, implicit-def $rax, debug-location !48
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renamable $ecx = MOVSX32rm8 killed renamable $rax, 1, $noreg, 0, $noreg, debug-location !48 :: (load 1 from %ir.call1)
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CMP32ri8 killed renamable $ecx, 45, implicit-def $eflags, debug-location !48
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[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.
Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.
Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon
Reviewed By: RKSimon
Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60228
llvm-svn: 357802
2019-04-05 21:28:09 +02:00
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JCC_1 %bb.3, 5, implicit $eflags, debug-location !48
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2018-11-02 02:31:52 +01:00
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bb.2.if.then:
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DBG_VALUE $rbp, 0, !44, !DIExpression(DW_OP_constu, 24, DW_OP_minus, DW_OP_deref, DW_OP_deref), debug-location !45
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renamable $rax = MOV64rm $rbp, 1, $noreg, -8, $noreg, debug-location !50 :: (load 8 from %ir.offset.addr)
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MOV64mi32 killed renamable $rax, 1, $noreg, 0, $noreg, 1, debug-location !50 :: (store 8 into %ir.1)
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bb.3.if.end:
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DBG_VALUE $rbp, 0, !44, !DIExpression(DW_OP_constu, 24, DW_OP_minus, DW_OP_deref, DW_OP_deref), debug-location !45
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$esi = XOR32rr undef $esi, undef $esi, implicit-def $eflags, implicit-def $rsi
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$rdi = MOV64rm $rbp, 1, $noreg, -24, $noreg :: (load 8 from %stack.2)
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$edx = MOV32ri 6, implicit-def $rdx, debug-location !51
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CALL64pcrel32 @_ZNSs5eraseEmm, csr_64, implicit $rsp, implicit $ssp, implicit killed $rdi, implicit killed $rsi, implicit killed $rdx, implicit-def $rax, debug-location !51
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renamable $rdx = MOV64rm $rbp, 1, $noreg, -16, $noreg, debug-location !52 :: (load 8 from %ir.limit.addr)
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MOV64mi32 killed renamable $rdx, 1, $noreg, 0, $noreg, 2, debug-location !52 :: (store 8 into %ir.2)
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MOV64mr $rbp, 1, $noreg, -32, $noreg, killed $rax :: (store 8 into %stack.3)
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$rsp = frame-destroy ADD64ri8 $rsp, 32, implicit-def dead $eflags, debug-location !53
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$rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !53
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CFI_INSTRUCTION def_cfa $rsp, 8, debug-location !53
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RETQ debug-location !53
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...
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