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llvm-mirror/test/MC/AVR/inst-cp.s

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[AVR] Add all of the machine code test suite Summary: This adds all of the AVR machine code tests. Reviewers: arsenm, kparzysz Subscribers: wdng, japaric Differential Revision: https://reviews.llvm.org/D26387 llvm-svn: 286417
2016-11-10 00:46:25 +01:00
; RUN: llvm-mc -triple avr -show-encoding < %s | FileCheck %s
[AVR] Disassemble register operands Simply by implementing a few functions I was able to correctly disassemble a much larger amount of instructions. Differential Revision: https://reviews.llvm.org/D74045
2020-02-05 12:53:06 +01:00
; RUN: llvm-mc -filetype=obj -triple avr < %s | llvm-objdump -d - | FileCheck -check-prefix=CHECK-INST %s
[AVR] Add all of the machine code test suite Summary: This adds all of the AVR machine code tests. Reviewers: arsenm, kparzysz Subscribers: wdng, japaric Differential Revision: https://reviews.llvm.org/D26387 llvm-svn: 286417
2016-11-10 00:46:25 +01:00
foo:
cp r12, r2
cp r19, r0
cp r15, r31
cp r0, r0
; CHECK: cp r12, r2 ; encoding: [0xc2,0x14]
; CHECK: cp r19, r0 ; encoding: [0x30,0x15]
; CHECK: cp r15, r31 ; encoding: [0xff,0x16]
; CHECK: cp r0, r0 ; encoding: [0x00,0x14]
[AVR] Disassemble register operands Simply by implementing a few functions I was able to correctly disassemble a much larger amount of instructions. Differential Revision: https://reviews.llvm.org/D74045
2020-02-05 12:53:06 +01:00
; CHECK-INST: cp r12, r2
; CHECK-INST: cp r19, r0
; CHECK-INST: cp r15, r31
; CHECK-INST: cp r0, r0
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