2018-04-30 19:54:28 +02:00
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; Test 32-bit addition in which the second operand is constant and in which
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; three-operand forms are available.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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declare i32 @foo()
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; Check addition of 1.
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define zeroext i1 @f1(i32 %dummy, i32 %a, i32 *%res) {
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; CHECK-LABEL: f1:
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; CHECK: alhsik [[REG1:%r[0-5]]], %r3, 1
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; CHECK-DAG: st [[REG1]], 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 35
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 1)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, i32 *%res
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ret i1 %obit
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}
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; Check the high end of the ALHSIK range.
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define zeroext i1 @f2(i32 %dummy, i32 %a, i32 *%res) {
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; CHECK-LABEL: f2:
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; CHECK: alhsik [[REG1:%r[0-5]]], %r3, 32767
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; CHECK-DAG: st [[REG1]], 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 35
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 32767)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, i32 *%res
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ret i1 %obit
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}
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; Check the next value up, which must use ALFI instead.
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define zeroext i1 @f3(i32 %dummy, i32 %a, i32 *%res) {
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; CHECK-LABEL: f3:
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; CHECK: alfi %r3, 32768
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 35
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 32768)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, i32 *%res
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ret i1 %obit
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}
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; Check the high end of the negative ALHSIK range.
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define zeroext i1 @f4(i32 %dummy, i32 %a, i32 *%res) {
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; CHECK-LABEL: f4:
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; CHECK: alhsik [[REG1:%r[0-5]]], %r3, -1
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; CHECK-DAG: st [[REG1]], 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 35
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 -1)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, i32 *%res
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ret i1 %obit
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}
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; Check the low end of the ALHSIK range.
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define zeroext i1 @f5(i32 %dummy, i32 %a, i32 *%res) {
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; CHECK-LABEL: f5:
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; CHECK: alhsik [[REG1:%r[0-5]]], %r3, -32768
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; CHECK-DAG: st [[REG1]], 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 35
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 -32768)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, i32 *%res
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ret i1 %obit
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}
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; Check the next value down, which must use ALFI instead.
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define zeroext i1 @f6(i32 %dummy, i32 %a, i32 *%res) {
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; CHECK-LABEL: f6:
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; CHECK: alfi %r3, 4294934527
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; CHECK-DAG: st %r3, 0(%r4)
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; CHECK-DAG: ipm [[REG2:%r[0-5]]]
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; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 35
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; CHECK: br %r14
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 -32769)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, i32 *%res
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ret i1 %obit
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}
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; Check using the overflow result for a branch.
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define void @f7(i32 %dummy, i32 %a, i32 *%res) {
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; CHECK-LABEL: f7:
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; CHECK: alhsik [[REG1:%r[0-5]]], %r3, 1
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; CHECK-DAG: st [[REG1]], 0(%r4)
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2018-07-20 11:40:43 +02:00
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; CHECK: jgnle foo@PLT
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; CHECK: br %r14
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2018-04-30 19:54:28 +02:00
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 1)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, i32 *%res
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br i1 %obit, label %call, label %exit
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call:
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tail call i32 @foo()
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br label %exit
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exit:
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ret void
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}
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; ... and the same with the inverted direction.
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define void @f8(i32 %dummy, i32 %a, i32 *%res) {
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; CHECK-LABEL: f8:
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; CHECK: alhsik [[REG1:%r[0-5]]], %r3, 1
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; CHECK-DAG: st [[REG1]], 0(%r4)
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2018-07-20 11:40:43 +02:00
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; CHECK: jgle foo@PLT
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; CHECK: br %r14
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2018-04-30 19:54:28 +02:00
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%t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %a, i32 1)
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%val = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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store i32 %val, i32 *%res
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br i1 %obit, label %exit, label %call
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call:
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tail call i32 @foo()
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br label %exit
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exit:
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ret void
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}
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declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
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