2020-04-09 18:17:23 +02:00
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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2020-07-21 19:27:18 +02:00
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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2020-04-09 18:17:23 +02:00
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; RUN: FileCheck %s --check-prefix=CHECK-S
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2020-07-21 19:27:18 +02:00
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; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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2020-04-09 18:17:23 +02:00
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; RUN: --filetype=obj < %s | \
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2020-07-21 19:27:18 +02:00
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; RUN: llvm-objdump --mcpu=pwr10 -dr - | FileCheck %s --check-prefix=CHECK-O
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2020-04-09 18:17:23 +02:00
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; Constant Pool Index.
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; CHECK-S-LABEL: ConstPool
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; CHECK-S: plfd f1, .LCPI0_0@PCREL(0), 1
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; CHECK-S: blr
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; CHECK-O-LABEL: ConstPool
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; CHECK-O: plfd 1, 0(0), 1
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; CHECK-O-NEXT: R_PPC64_PCREL34 .rodata.cst8
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; CHECK-O: blr
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define dso_local double @ConstPool() local_unnamed_addr {
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entry:
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ret double 0x406ECAB439581062
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}
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2020-06-05 12:47:20 +02:00
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@valIntLoc = common dso_local local_unnamed_addr global i32 0, align 4
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define dso_local signext i32 @ReadLocalVarInt() local_unnamed_addr {
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; CHECK-S-LABEL: ReadLocalVarInt
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; CHECK-S: # %bb.0: # %entry
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; CHECK-S-NEXT: plwa r3, valIntLoc@PCREL(0), 1
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; CHECK-S-NEXT: blr
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2020-04-09 18:17:23 +02:00
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2020-06-05 12:47:20 +02:00
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; CHECK-O-LABEL: ReadLocalVarInt
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; CHECK-O: plwa 3, 0(0), 1
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; CHECK-O-NEXT: R_PPC64_PCREL34 valIntLoc
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; CHECK-O-NEXT: blr
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entry:
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%0 = load i32, i32* @valIntLoc, align 4
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ret i32 %0
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}
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@valIntGlob = external global i32, align 4
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define dso_local signext i32 @ReadGlobalVarInt() local_unnamed_addr {
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; CHECK-S-LABEL: ReadGlobalVarInt
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; CHECK-S: # %bb.0: # %entry
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; CHECK-S-NEXT: pld r3, valIntGlob@got@pcrel(0), 1
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[PowerPC] Add linker opt for PC Relative GOT indirect accesses
A linker optimization is available on PowerPC for GOT indirect PCRelative loads.
The idea is that we can mark a usual GOT indirect load:
pld 3, vec@got@pcrel(0), 1
lwa 3, 4(3)
With a relocation to say that if we don't need to go through the GOT we can let
the linker further optimize this and replace a load with a nop.
pld 3, vec@got@pcrel(0), 1
.Lpcrel1:
.reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8)
lwa 3, 4(3)
This patch adds the logic that allows the compiler to add the R_PPC64_PCREL_OPT.
Reviewers: nemanjai, lei, hfinkel, sfertile, efriedma, tstellar, grosbach
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D79864
2020-07-21 21:29:54 +02:00
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; CHECK-S-NEXT: .Lpcrel:
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; CHECK-S-NEXT: .reloc .Lpcrel-8,R_PPC64_PCREL_OPT,.-(.Lpcrel-8)
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2020-06-05 12:47:20 +02:00
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; CHECK-S-NEXT: lwa r3, 0(r3)
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; CHECK-S-NEXT: blr
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; CHECK-O-LABEL: ReadGlobalVarInt
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; CHECK-O: pld 3, 0(0), 1
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; CHECK-O-NEXT: R_PPC64_GOT_PCREL34 valIntGlob
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[PowerPC] Add linker opt for PC Relative GOT indirect accesses
A linker optimization is available on PowerPC for GOT indirect PCRelative loads.
The idea is that we can mark a usual GOT indirect load:
pld 3, vec@got@pcrel(0), 1
lwa 3, 4(3)
With a relocation to say that if we don't need to go through the GOT we can let
the linker further optimize this and replace a load with a nop.
pld 3, vec@got@pcrel(0), 1
.Lpcrel1:
.reloc .Lpcrel1-8,R_PPC64_PCREL_OPT,.-(.Lpcrel1-8)
lwa 3, 4(3)
This patch adds the logic that allows the compiler to add the R_PPC64_PCREL_OPT.
Reviewers: nemanjai, lei, hfinkel, sfertile, efriedma, tstellar, grosbach
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D79864
2020-07-21 21:29:54 +02:00
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; CHECK-O-NEXT: R_PPC64_PCREL_OPT *ABS*+0x8
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2020-06-05 12:47:20 +02:00
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; CHECK-O-NEXT: lwa 3, 0(3)
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; CHECK-O-NEXT: blr
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entry:
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%0 = load i32, i32* @valIntGlob, align 4
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ret i32 %0
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}
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