2021-04-17 16:56:21 +02:00
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -passes='loop-mssa(licm)' < %s | FileCheck %s
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declare i1 @cond(i32 %v) readnone
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declare void @capture(i32* %p) readnone
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define void @test_captured_after_loop(i32 %len) {
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; CHECK-LABEL: @test_captured_after_loop(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COUNT:%.*]] = alloca i32, align 4
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; CHECK-NEXT: store i32 0, i32* [[COUNT]], align 4
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2021-04-17 15:25:29 +02:00
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; CHECK-NEXT: [[COUNT_PROMOTED:%.*]] = load i32, i32* [[COUNT]], align 4
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2021-04-17 16:56:21 +02:00
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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2021-04-17 15:25:29 +02:00
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; CHECK-NEXT: [[C_INC2:%.*]] = phi i32 [ [[COUNT_PROMOTED]], [[ENTRY:%.*]] ], [ [[C_INC1:%.*]], [[LATCH:%.*]] ]
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[I_NEXT:%.*]], [[LATCH]] ]
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2021-04-17 16:56:21 +02:00
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; CHECK-NEXT: [[COND:%.*]] = call i1 @cond(i32 [[I]])
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; CHECK-NEXT: br i1 [[COND]], label [[IF:%.*]], label [[LATCH]]
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; CHECK: if:
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2021-04-17 15:25:29 +02:00
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; CHECK-NEXT: [[C_INC:%.*]] = add i32 [[C_INC2]], 1
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2021-04-17 16:56:21 +02:00
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; CHECK-NEXT: br label [[LATCH]]
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; CHECK: latch:
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2021-04-17 15:25:29 +02:00
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; CHECK-NEXT: [[C_INC1]] = phi i32 [ [[C_INC]], [[IF]] ], [ [[C_INC2]], [[LOOP]] ]
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2021-04-17 16:56:21 +02:00
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; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[I_NEXT]], [[LEN:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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2021-04-17 15:25:29 +02:00
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; CHECK-NEXT: [[C_INC1_LCSSA:%.*]] = phi i32 [ [[C_INC1]], [[LATCH]] ]
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; CHECK-NEXT: store i32 [[C_INC1_LCSSA]], i32* [[COUNT]], align 4
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2021-04-17 16:56:21 +02:00
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; CHECK-NEXT: call void @capture(i32* [[COUNT]])
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; CHECK-NEXT: ret void
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;
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entry:
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%count = alloca i32
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store i32 0, i32* %count
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %latch ]
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%cond = call i1 @cond(i32 %i)
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br i1 %cond, label %if, label %latch
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if:
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%c = load i32, i32* %count
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%c.inc = add i32 %c, 1
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store i32 %c.inc, i32* %count
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br label %latch
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latch:
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%i.next = add nuw i32 %i, 1
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%cmp = icmp eq i32 %i.next, %len
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br i1 %cmp, label %exit, label %loop
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exit:
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call void @capture(i32* %count)
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ret void
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}
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define void @test_captured_in_loop(i32 %len) {
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; CHECK-LABEL: @test_captured_in_loop(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COUNT:%.*]] = alloca i32, align 4
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; CHECK-NEXT: store i32 0, i32* [[COUNT]], align 4
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LATCH:%.*]] ]
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; CHECK-NEXT: [[COND:%.*]] = call i1 @cond(i32 [[I]])
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; CHECK-NEXT: br i1 [[COND]], label [[IF:%.*]], label [[LATCH]]
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; CHECK: if:
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; CHECK-NEXT: [[C:%.*]] = load i32, i32* [[COUNT]], align 4
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; CHECK-NEXT: [[C_INC:%.*]] = add i32 [[C]], 1
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; CHECK-NEXT: store i32 [[C_INC]], i32* [[COUNT]], align 4
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; CHECK-NEXT: call void @capture(i32* [[COUNT]])
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; CHECK-NEXT: br label [[LATCH]]
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; CHECK: latch:
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; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[I_NEXT]], [[LEN:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%count = alloca i32
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store i32 0, i32* %count
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %latch ]
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%cond = call i1 @cond(i32 %i)
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br i1 %cond, label %if, label %latch
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if:
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%c = load i32, i32* %count
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%c.inc = add i32 %c, 1
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store i32 %c.inc, i32* %count
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call void @capture(i32* %count)
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br label %latch
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latch:
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%i.next = add nuw i32 %i, 1
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%cmp = icmp eq i32 %i.next, %len
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br i1 %cmp, label %exit, label %loop
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exit:
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ret void
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}
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define void @test_captured_before_loop(i32 %len) {
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; CHECK-LABEL: @test_captured_before_loop(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[COUNT:%.*]] = alloca i32, align 4
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; CHECK-NEXT: store i32 0, i32* [[COUNT]], align 4
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; CHECK-NEXT: call void @capture(i32* [[COUNT]])
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[I_NEXT:%.*]], [[LATCH:%.*]] ]
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; CHECK-NEXT: [[COND:%.*]] = call i1 @cond(i32 [[I]])
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; CHECK-NEXT: br i1 [[COND]], label [[IF:%.*]], label [[LATCH]]
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; CHECK: if:
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; CHECK-NEXT: [[C:%.*]] = load i32, i32* [[COUNT]], align 4
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; CHECK-NEXT: [[C_INC:%.*]] = add i32 [[C]], 1
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; CHECK-NEXT: store i32 [[C_INC]], i32* [[COUNT]], align 4
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; CHECK-NEXT: br label [[LATCH]]
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; CHECK: latch:
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; CHECK-NEXT: [[I_NEXT]] = add nuw i32 [[I]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[I_NEXT]], [[LEN:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%count = alloca i32
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store i32 0, i32* %count
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call void @capture(i32* %count)
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %latch ]
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%cond = call i1 @cond(i32 %i)
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br i1 %cond, label %if, label %latch
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if:
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%c = load i32, i32* %count
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%c.inc = add i32 %c, 1
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store i32 %c.inc, i32* %count
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br label %latch
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latch:
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%i.next = add nuw i32 %i, 1
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%cmp = icmp eq i32 %i.next, %len
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br i1 %cmp, label %exit, label %loop
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exit:
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ret void
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}
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