llvm-mirror/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt

# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {potentially undefined instruction encoding}

# invalid (imod, M, iflags) combination
0x93 0x00 0x02 0xf1
Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions. Fixes a large class of disassembler crashes found by randomized testing. llvm-svn: 137995 2011-08-19 00:11:02 +02:00			`# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 \|& grep {potentially undefined instruction encoding}`
Plug a leak in the arm disassembler and put the tests back. llvm-svn: 128238 2011-03-24 22:14:28 +01:00
			`# invalid (imod, M, iflags) combination`
Reapply r143202, with a manual decoding hook for SWP. This change inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle. llvm-svn: 143208 2011-10-28 20:02:13 +02:00			`0x93 0x00 0x02 0xf1`