2012-05-10 23:48:22 +02:00
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; Positive test for inline register constraints
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;
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; RUN: llc -march=mipsel < %s | FileCheck %s
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define i32 @main() nounwind {
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entry:
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; X with -3
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;CHECK: #APP
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;CHECK: addi ${{[0-9]+}},${{[0-9]+}},0xfffffffffffffffd
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;CHECK: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:X}", "=r,r,I"(i32 7, i32 -3) nounwind
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2012-05-18 19:39:35 +02:00
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; x with -3
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;CHECK: #APP
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;CHECK: addi ${{[0-9]+}},${{[0-9]+}},0xfffd
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;CHECK: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:x}", "=r,r,I"(i32 7, i32 -3) nounwind
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2012-05-19 02:51:56 +02:00
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; d with -3
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;CHECK: #APP
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;CHECK: addi ${{[0-9]+}},${{[0-9]+}},-3
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;CHECK: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:d}", "=r,r,I"(i32 7, i32 -3) nounwind
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2012-05-30 21:05:19 +02:00
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; m with -3
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;CHECK: #APP
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;CHECK: addi ${{[0-9]+}},${{[0-9]+}},-4
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;CHECK: #NO_APP
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tail call i32 asm sideeffect "addi $0,$1,${2:m}", "=r,r,I"(i32 7, i32 -3) nounwind
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2012-05-10 23:48:22 +02:00
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ret i32 0
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}
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