2015-12-21 15:43:45 +01:00
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; RUN: llc -mtriple=arm64-linux-gnu -enable-misched=false -disable-post-ra < %s | FileCheck %s
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2014-03-29 11:18:08 +01:00
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@var = global i32 0, align 4
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2015-04-17 23:31:25 +02:00
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; CHECK-LABEL: @test_i128_align
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2014-03-29 11:18:08 +01:00
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define i128 @test_i128_align(i32, i128 %arg, i32 %after) {
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store i32 %after, i32* @var, align 4
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; CHECK: str w4, [{{x[0-9]+}}, :lo12:var]
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ret i128 %arg
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; CHECK: mov x0, x2
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; CHECK: mov x1, x3
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}
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2015-04-17 23:31:25 +02:00
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; CHECK-LABEL: @test_i64x2_align
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define [2 x i64] @test_i64x2_align(i32, [2 x i64] %arg, i32 %after) {
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store i32 %after, i32* @var, align 4
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; CHECK: str w3, [{{x[0-9]+}}, :lo12:var]
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ret [2 x i64] %arg
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; CHECK: mov x0, x1
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; CHECK: mov x1, x2
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}
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2014-03-29 11:18:08 +01:00
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@var64 = global i64 0, align 8
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; Check stack slots are 64-bit at all times.
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define void @test_stack_slots([8 x i32], i1 %bool, i8 %char, i16 %short,
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i32 %int, i64 %long) {
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%ext_bool = zext i1 %bool to i64
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store volatile i64 %ext_bool, i64* @var64, align 8
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2014-05-07 13:28:36 +02:00
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; CHECK: ldrb w[[EXT:[0-9]+]], [sp]
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2015-08-15 15:27:30 +02:00
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; Part of last store. Blasted scheduler.
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; CHECK: ldr [[LONG:x[0-9]+]], [sp, #32]
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2014-03-29 11:18:08 +01:00
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; CHECK: and x[[EXTED:[0-9]+]], x[[EXT]], #0x1
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; CHECK: str x[[EXTED]], [{{x[0-9]+}}, :lo12:var64]
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%ext_char = zext i8 %char to i64
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store volatile i64 %ext_char, i64* @var64, align 8
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; CHECK: ldrb w[[EXT:[0-9]+]], [sp, #8]
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; CHECK: str x[[EXT]], [{{x[0-9]+}}, :lo12:var64]
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%ext_short = zext i16 %short to i64
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store volatile i64 %ext_short, i64* @var64, align 8
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; CHECK: ldrh w[[EXT:[0-9]+]], [sp, #16]
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; CHECK: str x[[EXT]], [{{x[0-9]+}}, :lo12:var64]
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%ext_int = zext i32 %int to i64
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store volatile i64 %ext_int, i64* @var64, align 8
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2014-05-07 13:28:36 +02:00
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; CHECK: ldr{{b?}} w[[EXT:[0-9]+]], [sp, #24]
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2014-03-29 11:18:08 +01:00
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; CHECK: str x[[EXT]], [{{x[0-9]+}}, :lo12:var64]
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store volatile i64 %long, i64* @var64, align 8
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; CHECK: str [[LONG]], [{{x[0-9]+}}, :lo12:var64]
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ret void
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}
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; Make sure the callee does extensions (in the absence of zext/sext
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; keyword on args) while we're here.
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define void @test_extension(i1 %bool, i8 %char, i16 %short, i32 %int) {
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%ext_bool = zext i1 %bool to i64
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store volatile i64 %ext_bool, i64* @var64
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2015-08-15 15:27:30 +02:00
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; CHECK: and w[[EXT:[0-9]+]], w0, #0x1
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; CHECK: str x[[EXT]], [{{x[0-9]+}}, :lo12:var64]
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2014-03-29 11:18:08 +01:00
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%ext_char = sext i8 %char to i64
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store volatile i64 %ext_char, i64* @var64
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2014-04-17 22:47:31 +02:00
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; CHECK: sxtb [[EXT:x[0-9]+]], w1
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2014-03-29 11:18:08 +01:00
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; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]
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%ext_short = zext i16 %short to i64
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store volatile i64 %ext_short, i64* @var64
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2015-08-15 15:27:30 +02:00
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; CHECK: and w[[EXT:[0-9]+]], w2, #0xffff
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; CHECK: str x[[EXT]], [{{x[0-9]+}}, :lo12:var64]
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2014-03-29 11:18:08 +01:00
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%ext_int = zext i32 %int to i64
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store volatile i64 %ext_int, i64* @var64
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2015-07-29 23:34:32 +02:00
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; CHECK: mov w[[EXT:[0-9]+]], w3
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; CHECK: str x[[EXT]], [{{x[0-9]+}}, :lo12:var64]
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2014-03-29 11:18:08 +01:00
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ret void
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}
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declare void @variadic(i32 %a, ...)
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; Under AAPCS variadic functions have the same calling convention as
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; others. The extra arguments should go in registers rather than on the stack.
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define void @test_variadic() {
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[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
See r230786 and r230794 for similar changes to gep and load
respectively.
Call is a bit different because it often doesn't have a single explicit
type - usually the type is deduced from the arguments, and just the
return type is explicit. In those cases there's no need to change the
IR.
When that's not the case, the IR usually contains the pointer type of
the first operand - but since typed pointers are going away, that
representation is insufficient so I'm just stripping the "pointerness"
of the explicit type away.
This does make the IR a bit weird - it /sort of/ reads like the type of
the first operand: "call void () %x(" but %x is actually of type "void
()*" and will eventually be just of type "ptr". But this seems not too
bad and I don't think it would benefit from repeating the type
("void (), void () * %x(" and then eventually "void (), ptr %x(") as has
been done with gep and load.
This also has a side benefit: since the explicit type is no longer a
pointer, there's no ambiguity between an explicit type and a function
that returns a function pointer. Previously this case needed an explicit
type (eg: a function returning a void() function was written as
"call void () () * @x(" rather than "call void () * @x(" because of the
ambiguity between a function returning a pointer to a void() function
and a function returning void).
No ambiguity means even function pointer return types can just be
written alone, without writing the whole function's type.
This leaves /only/ the varargs case where the explicit type is required.
Given the special type syntax in call instructions, the regex-fu used
for migration was a bit more involved in its own unique way (as every
one of these is) so here it is. Use it in conjunction with the apply.sh
script and associated find/xargs commands I've provided in rr230786 to
migrate your out of tree tests. Do let me know if any of this doesn't
cover your cases & we can iterate on a more general script/regexes to
help others with out of tree tests.
About 9 test cases couldn't be automatically migrated - half of those
were functions returning function pointers, where I just had to manually
delete the function argument types now that we didn't need an explicit
function type there. The other half were typedefs of function types used
in calls - just had to manually drop the * from those.
import fileinput
import sys
import re
pat = re.compile(r'((?:=|:|^|\s)call\s(?:[^@]*?))(\s*$|\s*(?:(?:\[\[[a-zA-Z0-9_]+\]\]|[@%](?:(")?[\\\?@a-zA-Z0-9_.]*?(?(3)"|)|{{.*}}))(?:\(|$)|undef|inttoptr|bitcast|null|asm).*$)')
addrspace_end = re.compile(r"addrspace\(\d+\)\s*\*$")
func_end = re.compile("(?:void.*|\)\s*)\*$")
def conv(match, line):
if not match or re.search(addrspace_end, match.group(1)) or not re.search(func_end, match.group(1)):
return line
return line[:match.start()] + match.group(1)[:match.group(1).rfind('*')].rstrip() + match.group(2) + line[match.end():]
for line in sys.stdin:
sys.stdout.write(conv(re.search(pat, line), line))
llvm-svn: 235145
2015-04-17 01:24:18 +02:00
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call void(i32, ...) @variadic(i32 0, i64 1, double 2.0)
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2014-03-29 11:18:08 +01:00
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; CHECK: fmov d0, #2.0
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2014-04-16 13:52:51 +02:00
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; CHECK: orr w1, wzr, #0x1
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2014-03-29 11:18:08 +01:00
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; CHECK: bl variadic
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ret void
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}
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2014-04-16 11:03:25 +02:00
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; We weren't marking x7 as used after deciding that the i128 didn't fit into
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; registers and putting the first half on the stack, so the *second* half went
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; into x7. Yuck!
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define i128 @test_i128_shadow([7 x i64] %x0_x6, i128 %sp) {
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; CHECK-LABEL: test_i128_shadow:
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; CHECK: ldp x0, x1, [sp]
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ret i128 %sp
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}
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2014-04-25 14:07:03 +02:00
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; This test is to check if fp128 can be correctly handled on stack.
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define fp128 @test_fp128([8 x float] %arg0, fp128 %arg1) {
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; CHECK-LABEL: test_fp128:
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; CHECK: ldr {{q[0-9]+}}, [sp]
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ret fp128 %arg1
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}
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2014-06-03 05:25:09 +02:00
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; Check if VPR can be correctly pass by stack.
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define <2 x double> @test_vreg_stack([8 x <2 x double>], <2 x double> %varg_stack) {
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entry:
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; CHECK-LABEL: test_vreg_stack:
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; CHECK: ldr {{q[0-9]+}}, [sp]
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ret <2 x double> %varg_stack;
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}
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2014-07-11 15:33:46 +02:00
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; Check that f16 can be passed and returned (ACLE 2.0 extension)
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define half @test_half(float, half %arg) {
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; CHECK-LABEL: test_half:
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2014-08-27 18:16:04 +02:00
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; CHECK: mov v0.16b, v1.16b
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2014-07-11 15:33:46 +02:00
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ret half %arg;
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}
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; Check that f16 constants are materialized correctly
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define half @test_half_const() {
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; CHECK-LABEL: test_half_const:
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; CHECK: ldr h0, [x{{[0-9]+}}, :lo12:{{.*}}]
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ret half 0xH4248
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}
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2014-08-27 18:16:04 +02:00
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; Check that v4f16 can be passed and returned in registers
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define <4 x half> @test_v4_half_register(float, <4 x half> %arg) {
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; CHECK-LABEL: test_v4_half_register:
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; CHECK: mov v0.16b, v1.16b
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ret <4 x half> %arg;
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}
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; Check that v8f16 can be passed and returned in registers
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define <8 x half> @test_v8_half_register(float, <8 x half> %arg) {
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; CHECK-LABEL: test_v8_half_register:
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; CHECK: mov v0.16b, v1.16b
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ret <8 x half> %arg;
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}
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; Check that v4f16 can be passed and returned on the stack
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define <4 x half> @test_v4_half_stack([8 x <2 x double>], <4 x half> %arg) {
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; CHECK-LABEL: test_v4_half_stack:
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; CHECK: ldr d0, [sp]
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ret <4 x half> %arg;
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}
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; Check that v8f16 can be passed and returned on the stack
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define <8 x half> @test_v8_half_stack([8 x <2 x double>], <8 x half> %arg) {
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; CHECK-LABEL: test_v8_half_stack:
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; CHECK: ldr q0, [sp]
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ret <8 x half> %arg;
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}
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