2011-08-30 09:23:29 +02:00
|
|
|
//===-- MipsMCTargetDesc.h - Mips Target Descriptions -----------*- C++ -*-===//
|
2011-07-14 22:59:42 +02:00
|
|
|
//
|
|
|
|
// The LLVM Compiler Infrastructure
|
|
|
|
//
|
|
|
|
// This file is distributed under the University of Illinois Open Source
|
|
|
|
// License. See LICENSE.TXT for details.
|
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//
|
2011-08-30 09:23:29 +02:00
|
|
|
// This file provides Mips specific target descriptions.
|
2011-07-14 22:59:42 +02:00
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
2011-08-30 09:23:29 +02:00
|
|
|
#ifndef MIPSMCTARGETDESC_H
|
|
|
|
#define MIPSMCTARGETDESC_H
|
2011-07-14 22:59:42 +02:00
|
|
|
|
2011-12-22 04:03:17 +01:00
|
|
|
#include "llvm/Support/DataTypes.h"
|
|
|
|
|
2011-07-14 22:59:42 +02:00
|
|
|
namespace llvm {
|
2011-09-30 23:23:45 +02:00
|
|
|
class MCAsmBackend;
|
2011-09-30 22:40:03 +02:00
|
|
|
class MCCodeEmitter;
|
|
|
|
class MCContext;
|
2011-11-11 23:58:42 +01:00
|
|
|
class MCInstrInfo;
|
|
|
|
class MCObjectWriter;
|
2012-05-15 19:35:52 +02:00
|
|
|
class MCRegisterInfo;
|
2011-07-14 22:59:42 +02:00
|
|
|
class MCSubtargetInfo;
|
|
|
|
class StringRef;
|
2011-09-30 22:40:03 +02:00
|
|
|
class Target;
|
2011-11-11 23:58:42 +01:00
|
|
|
class raw_ostream;
|
2011-07-14 22:59:42 +02:00
|
|
|
|
|
|
|
extern Target TheMipsTarget;
|
|
|
|
extern Target TheMipselTarget;
|
2011-09-21 05:00:58 +02:00
|
|
|
extern Target TheMips64Target;
|
|
|
|
extern Target TheMips64elTarget;
|
2011-07-14 22:59:42 +02:00
|
|
|
|
2012-03-01 02:53:15 +01:00
|
|
|
MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
|
2012-05-15 19:35:52 +02:00
|
|
|
const MCRegisterInfo &MRI,
|
2012-03-01 02:53:15 +01:00
|
|
|
const MCSubtargetInfo &STI,
|
|
|
|
MCContext &Ctx);
|
|
|
|
MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
|
2012-05-15 19:35:52 +02:00
|
|
|
const MCRegisterInfo &MRI,
|
2012-03-01 02:53:15 +01:00
|
|
|
const MCSubtargetInfo &STI,
|
|
|
|
MCContext &Ctx);
|
2011-09-30 23:23:45 +02:00
|
|
|
|
2013-09-09 04:37:14 +02:00
|
|
|
MCAsmBackend *createMipsAsmBackendEB32(const Target &T, const MCRegisterInfo &MRI,
|
|
|
|
StringRef TT, StringRef CPU);
|
|
|
|
MCAsmBackend *createMipsAsmBackendEL32(const Target &T, const MCRegisterInfo &MRI,
|
|
|
|
StringRef TT, StringRef CPU);
|
|
|
|
MCAsmBackend *createMipsAsmBackendEB64(const Target &T, const MCRegisterInfo &MRI,
|
|
|
|
StringRef TT, StringRef CPU);
|
|
|
|
MCAsmBackend *createMipsAsmBackendEL64(const Target &T, const MCRegisterInfo &MRI,
|
|
|
|
StringRef TT, StringRef CPU);
|
2011-11-11 23:58:42 +01:00
|
|
|
|
2011-12-22 04:03:17 +01:00
|
|
|
MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
|
2012-03-01 02:53:15 +01:00
|
|
|
uint8_t OSABI,
|
2012-04-02 21:25:22 +02:00
|
|
|
bool IsLittleEndian,
|
|
|
|
bool Is64Bit);
|
2011-07-14 22:59:42 +02:00
|
|
|
} // End llvm namespace
|
|
|
|
|
|
|
|
// Defines symbolic names for Mips registers. This defines a mapping from
|
|
|
|
// register name to register number.
|
|
|
|
#define GET_REGINFO_ENUM
|
|
|
|
#include "MipsGenRegisterInfo.inc"
|
|
|
|
|
|
|
|
// Defines symbolic names for the Mips instructions.
|
|
|
|
#define GET_INSTRINFO_ENUM
|
|
|
|
#include "MipsGenInstrInfo.inc"
|
|
|
|
|
|
|
|
#define GET_SUBTARGETINFO_ENUM
|
|
|
|
#include "MipsGenSubtargetInfo.inc"
|
|
|
|
|
|
|
|
#endif
|