1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 15:32:52 +01:00
llvm-mirror/lib/Target/X86/X86InstrInfo.def

48 lines
2.0 KiB
Modula-2
Raw Normal View History

//===-- X86InstructionInfo.def - X86 Instruction Information ----*- C++ -*-===//
//
// This file describes all of the instructions that the X86 backend uses. It
// relys on an external 'I' macro being defined that takes the arguments
// specified below, and is used to make all of the information relevant to an
// instruction be in one place.
//
//===----------------------------------------------------------------------===//
// NOTE: No include guards desired
#ifndef I
#errror "Must define I macro before including X86/X86InstructionInfo.def!"
#endif
// Arguments to be passed into the I macro
// #1: Enum name - This ends up being the opcode symbol in the X86 namespace
// #2: Opcode name, as used by the gnu assembler
// #3: Instruction Flags - This should be a field or'd together that contains
2002-10-29 21:48:56 +01:00
// constants from the MachineInstrInfo.h file.
// #4: Target Specific Flags - Another bitfield containing X86 specific flags
// that we are interested in for each instruction. These should be flags
// defined in X86InstrInfo.h in the X86II namespace.
//
// The first instruction must always be the PHI instruction: (FIXME, not yet)
I(PHI , "phi", 0, 0)
// The second instruction must always be the noop instruction: (FIXME, not yet)
I(NOOP , "nop", 0, X86II::Void) // nop 90
// Miscellaneous instructions
I(RET , "ret", M_RET_FLAG, X86II::Void) // ret CB
// Move instructions
I(MOVir8 , "movb", 0, 0) // R = imm8 B0+ rb
I(MOVir16 , "movw", 0, 0) // R = imm16 B8+ rw
I(MOVir32 , "movl", 0, 0) // R = imm32 B8+ rd
// Arithmetic instructions
I(ADDrr8 , "addb", 0, 0) // R8 += R8 00/r
I(ADDrr16 , "addw", 0, 0) // R16 += R16 01/r
I(ADDrr32 , "addl", 0, 0) // R32 += R32 02/r
// At this point, I is dead, so undefine the macro
#undef I