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llvm-mirror/test/Transforms/InstCombine/overflow.ll

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Reapply r121905 (automatic synthesis of @llvm.sadd.with.overflow) with a fix for a bug that manifested itself on the DragonEgg self-host bot. Unfortunately, the testcase is pretty messy and doesn't reduce well due to interactions with other parts of InstCombine. llvm-svn: 122072
2010-12-17 19:08:00 +01:00
; RUN: opt -S -instcombine < %s | FileCheck %s
; <rdar://problem/8558713>
generalize the sadd creation code to not require that the sadd formed is half the size of the original type. We can now compile this into a sadd.i8: unsigned char X(char a, char b) { int res = a+b; if ((unsigned )(res+128) > 255U) abort(); return res; } llvm-svn: 122178
2010-12-19 19:35:09 +01:00
declare void @throwAnExceptionOrWhatever()
fix a bug (possibly 8816) in the sadd forming xform: it isn't profitable (or safe) to promote code when the add-with-constant has other uses. llvm-svn: 122175
2010-12-19 18:59:02 +01:00
Reapply r121905 (automatic synthesis of @llvm.sadd.with.overflow) with a fix for a bug that manifested itself on the DragonEgg self-host bot. Unfortunately, the testcase is pretty messy and doesn't reduce well due to interactions with other parts of InstCombine. llvm-svn: 122072
2010-12-17 19:08:00 +01:00
; CHECK: @test1
define i32 @test1(i32 %a, i32 %b) nounwind ssp {
entry:
; CHECK-NOT: sext
%conv = sext i32 %a to i64
%conv2 = sext i32 %b to i64
%add = add nsw i64 %conv2, %conv
%add.off = add i64 %add, 2147483648
fix another miscompile in the llvm.sadd formation logic: it wasn't checking to see if the high bits of the original add result were dead. Inserting a smaller add and zexting back to that size is not good enough. This is likely to be the fix for 8816. llvm-svn: 122177
2010-12-19 19:22:06 +01:00
; CHECK: llvm.sadd.with.overflow.i32
Reapply r121905 (automatic synthesis of @llvm.sadd.with.overflow) with a fix for a bug that manifested itself on the DragonEgg self-host bot. Unfortunately, the testcase is pretty messy and doesn't reduce well due to interactions with other parts of InstCombine. llvm-svn: 122072
2010-12-17 19:08:00 +01:00
%0 = icmp ugt i64 %add.off, 4294967295
br i1 %0, label %if.then, label %if.end
if.then:
generalize the sadd creation code to not require that the sadd formed is half the size of the original type. We can now compile this into a sadd.i8: unsigned char X(char a, char b) { int res = a+b; if ((unsigned )(res+128) > 255U) abort(); return res; } llvm-svn: 122178
2010-12-19 19:35:09 +01:00
tail call void @throwAnExceptionOrWhatever() nounwind
Reapply r121905 (automatic synthesis of @llvm.sadd.with.overflow) with a fix for a bug that manifested itself on the DragonEgg self-host bot. Unfortunately, the testcase is pretty messy and doesn't reduce well due to interactions with other parts of InstCombine. llvm-svn: 122072
2010-12-17 19:08:00 +01:00
br label %if.end
if.end:
; CHECK-NOT: trunc
%conv9 = trunc i64 %add to i32
; CHECK: ret i32
ret i32 %conv9
}
fix a bug (possibly 8816) in the sadd forming xform: it isn't profitable (or safe) to promote code when the add-with-constant has other uses. llvm-svn: 122175
2010-12-19 18:59:02 +01:00
; CHECK: @test2
; This form should not be promoted for two reasons: 1) it is unprofitable to
; promote it since the add.off instruction has another use, and 2) it is unsafe
; because the add-with-off makes the high bits of the original add live.
define i32 @test2(i32 %a, i32 %b, i64* %P) nounwind ssp {
entry:
%conv = sext i32 %a to i64
%conv2 = sext i32 %b to i64
%add = add nsw i64 %conv2, %conv
%add.off = add i64 %add, 2147483648
store i64 %add.off, i64* %P
; CHECK-NOT: llvm.sadd.with.overflow
%0 = icmp ugt i64 %add.off, 4294967295
br i1 %0, label %if.then, label %if.end
if.then:
generalize the sadd creation code to not require that the sadd formed is half the size of the original type. We can now compile this into a sadd.i8: unsigned char X(char a, char b) { int res = a+b; if ((unsigned )(res+128) > 255U) abort(); return res; } llvm-svn: 122178
2010-12-19 19:35:09 +01:00
tail call void @throwAnExceptionOrWhatever() nounwind
fix a bug (possibly 8816) in the sadd forming xform: it isn't profitable (or safe) to promote code when the add-with-constant has other uses. llvm-svn: 122175
2010-12-19 18:59:02 +01:00
br label %if.end
if.end:
%conv9 = trunc i64 %add to i32
; CHECK: ret i32
ret i32 %conv9
}
fix another miscompile in the llvm.sadd formation logic: it wasn't checking to see if the high bits of the original add result were dead. Inserting a smaller add and zexting back to that size is not good enough. This is likely to be the fix for 8816. llvm-svn: 122177
2010-12-19 19:22:06 +01:00
; CHECK: test3
generalize the sadd creation code to not require that the sadd formed is half the size of the original type. We can now compile this into a sadd.i8: unsigned char X(char a, char b) { int res = a+b; if ((unsigned )(res+128) > 255U) abort(); return res; } llvm-svn: 122178
2010-12-19 19:35:09 +01:00
; PR8816
fix another miscompile in the llvm.sadd formation logic: it wasn't checking to see if the high bits of the original add result were dead. Inserting a smaller add and zexting back to that size is not good enough. This is likely to be the fix for 8816. llvm-svn: 122177
2010-12-19 19:22:06 +01:00
; This is illegal to transform because the high bits of the original add are
; live out.
define i64 @test3(i32 %a, i32 %b) nounwind ssp {
entry:
%conv = sext i32 %a to i64
%conv2 = sext i32 %b to i64
%add = add nsw i64 %conv2, %conv
%add.off = add i64 %add, 2147483648
; CHECK-NOT: llvm.sadd.with.overflow
%0 = icmp ugt i64 %add.off, 4294967295
br i1 %0, label %if.then, label %if.end
if.then:
generalize the sadd creation code to not require that the sadd formed is half the size of the original type. We can now compile this into a sadd.i8: unsigned char X(char a, char b) { int res = a+b; if ((unsigned )(res+128) > 255U) abort(); return res; } llvm-svn: 122178
2010-12-19 19:35:09 +01:00
tail call void @throwAnExceptionOrWhatever() nounwind
fix another miscompile in the llvm.sadd formation logic: it wasn't checking to see if the high bits of the original add result were dead. Inserting a smaller add and zexting back to that size is not good enough. This is likely to be the fix for 8816. llvm-svn: 122177
2010-12-19 19:22:06 +01:00
br label %if.end
if.end:
ret i64 %add
; CHECK: ret i64
}
generalize the sadd creation code to not require that the sadd formed is half the size of the original type. We can now compile this into a sadd.i8: unsigned char X(char a, char b) { int res = a+b; if ((unsigned )(res+128) > 255U) abort(); return res; } llvm-svn: 122178
2010-12-19 19:35:09 +01:00
; CHECK: @test4
; Should be able to form an i8 sadd computed in an i32.
define zeroext i8 @test4(i8 signext %a, i8 signext %b) nounwind ssp {
entry:
%conv = sext i8 %a to i32
%conv2 = sext i8 %b to i32
%add = add nsw i32 %conv2, %conv
%add4 = add nsw i32 %add, 128
%cmp = icmp ugt i32 %add4, 255
br i1 %cmp, label %if.then, label %if.end
; CHECK: llvm.sadd.with.overflow.i8
if.then: ; preds = %entry
tail call void @throwAnExceptionOrWhatever() nounwind
unreachable
if.end: ; preds = %entry
%conv7 = trunc i32 %add to i8
ret i8 %conv7
; CHECK: ret i8
}
recognize an unsigned add with overflow idiom into uadd. This resolves a README entry and technically resolves PR4916, but we still get poor code for the testcase in that PR because GVN isn't CSE'ing uadd with add, filed as PR8817. Previously we got: _test7: ## @test7 addq %rsi, %rdi cmpq %rdi, %rsi movl $42, %eax cmovaq %rsi, %rax ret Now we get: _test7: ## @test7 addq %rsi, %rdi movl $42, %eax cmovbq %rsi, %rax ret llvm-svn: 122182
2010-12-19 20:37:52 +01:00
; CHECK: @test5
; CHECK: llvm.uadd.with.overflow
; CHECK: ret i64
define i64 @test5(i64 %a, i64 %b) nounwind ssp {
entry:
%add = add i64 %b, %a
%cmp = icmp ult i64 %add, %a
%Q = select i1 %cmp, i64 %b, i64 42
ret i64 %Q
}
; CHECK: @test6
; CHECK: llvm.uadd.with.overflow
; CHECK: ret i64
define i64 @test6(i64 %a, i64 %b) nounwind ssp {
entry:
%add = add i64 %b, %a
%cmp = icmp ult i64 %add, %b
%Q = select i1 %cmp, i64 %b, i64 42
ret i64 %Q
}
; CHECK: @test7
; CHECK: llvm.uadd.with.overflow
; CHECK: ret i64
define i64 @test7(i64 %a, i64 %b) nounwind ssp {
entry:
%add = add i64 %b, %a
%cmp = icmp ugt i64 %b, %add
%Q = select i1 %cmp, i64 %b, i64 42
ret i64 %Q
}
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