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llvm-mirror/test/MC/Mips/macro-la-bad.s

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[mips] Fix li/la differences between IAS and GAS. Summary: - Signed 16-bit should have priority over unsigned. - For la, unsigned 16-bit must use ori+addu rather than directly use ori. - Correct tests on 32-bit immediates with 64-bit predicates by sign-extending the immediate beforehand. For example, isInt<16>(0xffff8000) should be true and use addiu. Also split li/la testing into separate files due to their size. Reviewers: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10967 llvm-svn: 242139
2015-07-14 12:24:22 +00:00
# RUN: not llvm-mc %s -arch=mips -mcpu=mips32r2 2>%t1
[mips] Enable `la` pseudo instruction on 64-bit arch. This patch makes LLVM compatible with GAS. It accepts `la` pseudo instruction on arch with 64-bit pointers and just shows a warning. Differential Revision: https://reviews.llvm.org/D70202
2019-11-12 00:10:31 +03:00
# RUN: FileCheck %s < %t1 --check-prefix=O32
[mips] Fix li/la differences between IAS and GAS. Summary: - Signed 16-bit should have priority over unsigned. - For la, unsigned 16-bit must use ori+addu rather than directly use ori. - Correct tests on 32-bit immediates with 64-bit predicates by sign-extending the immediate beforehand. For example, isInt<16>(0xffff8000) should be true and use addiu. Also split li/la testing into separate files due to their size. Reviewers: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10967 llvm-svn: 242139
2015-07-14 12:24:22 +00:00
# RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 | \
[mips] [IAS] Add support for the DLA pseudo-instruction and fix problems with DLI Summary: It is the same as LA, except that it can also load 64-bit addresses and it only works on 64-bit MIPS architectures. Reviewers: tomatabacu, seanbruno, vkalintiris Subscribers: brooks, seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D9524 llvm-svn: 245208
2015-08-17 10:11:55 +00:00
# RUN: FileCheck %s --check-prefix=N32
[mips] Enable `la` pseudo instruction on 64-bit arch. This patch makes LLVM compatible with GAS. It accepts `la` pseudo instruction on arch with 64-bit pointers and just shows a warning. Differential Revision: https://reviews.llvm.org/D70202
2019-11-12 00:10:31 +03:00
# RUN: llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 | \
[mips] [IAS] Add support for the DLA pseudo-instruction and fix problems with DLI Summary: It is the same as LA, except that it can also load 64-bit addresses and it only works on 64-bit MIPS architectures. Reviewers: tomatabacu, seanbruno, vkalintiris Subscribers: brooks, seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D9524 llvm-svn: 245208
2015-08-17 10:11:55 +00:00
# RUN: FileCheck %s --check-prefix=N64
[mips] Fix li/la differences between IAS and GAS. Summary: - Signed 16-bit should have priority over unsigned. - For la, unsigned 16-bit must use ori+addu rather than directly use ori. - Correct tests on 32-bit immediates with 64-bit predicates by sign-extending the immediate beforehand. For example, isInt<16>(0xffff8000) should be true and use addiu. Also split li/la testing into separate files due to their size. Reviewers: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10967 llvm-svn: 242139
2015-07-14 12:24:22 +00:00
.text
la $5, 0x100000000
[mips] [IAS] Add support for the DLA pseudo-instruction and fix problems with DLI Summary: It is the same as LA, except that it can also load 64-bit addresses and it only works on 64-bit MIPS architectures. Reviewers: tomatabacu, seanbruno, vkalintiris Subscribers: brooks, seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D9524 llvm-svn: 245208
2015-08-17 10:11:55 +00:00
# O32: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate
# N32: :[[@LINE-2]]:3: error: instruction requires a 32-bit immediate
[mips] Enable `la` pseudo instruction on 64-bit arch. This patch makes LLVM compatible with GAS. It accepts `la` pseudo instruction on arch with 64-bit pointers and just shows a warning. Differential Revision: https://reviews.llvm.org/D70202
2019-11-12 00:10:31 +03:00
# N64: :[[@LINE-3]]:3: warning: la used to load 64-bit address
[mips] [IAS] Add support for the DLA pseudo-instruction and fix problems with DLI Summary: It is the same as LA, except that it can also load 64-bit addresses and it only works on 64-bit MIPS architectures. Reviewers: tomatabacu, seanbruno, vkalintiris Subscribers: brooks, seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D9524 llvm-svn: 245208
2015-08-17 10:11:55 +00:00
[mips] Fix li/la differences between IAS and GAS. Summary: - Signed 16-bit should have priority over unsigned. - For la, unsigned 16-bit must use ori+addu rather than directly use ori. - Correct tests on 32-bit immediates with 64-bit predicates by sign-extending the immediate beforehand. For example, isInt<16>(0xffff8000) should be true and use addiu. Also split li/la testing into separate files due to their size. Reviewers: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10967 llvm-svn: 242139
2015-07-14 12:24:22 +00:00
la $5, 0x100000000($6)
[mips] [IAS] Add support for the DLA pseudo-instruction and fix problems with DLI Summary: It is the same as LA, except that it can also load 64-bit addresses and it only works on 64-bit MIPS architectures. Reviewers: tomatabacu, seanbruno, vkalintiris Subscribers: brooks, seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D9524 llvm-svn: 245208
2015-08-17 10:11:55 +00:00
# O32: :[[@LINE-1]]:3: error: instruction requires a 32-bit immediate
# N32: :[[@LINE-2]]:3: error: instruction requires a 32-bit immediate
[mips] Enable `la` pseudo instruction on 64-bit arch. This patch makes LLVM compatible with GAS. It accepts `la` pseudo instruction on arch with 64-bit pointers and just shows a warning. Differential Revision: https://reviews.llvm.org/D70202
2019-11-12 00:10:31 +03:00
# N64: :[[@LINE-3]]:3: warning: la used to load 64-bit address
[mips] [IAS] Add support for the DLA pseudo-instruction and fix problems with DLI Summary: It is the same as LA, except that it can also load 64-bit addresses and it only works on 64-bit MIPS architectures. Reviewers: tomatabacu, seanbruno, vkalintiris Subscribers: brooks, seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D9524 llvm-svn: 245208
2015-08-17 10:11:55 +00:00
[mips] Fix li/la differences between IAS and GAS. Summary: - Signed 16-bit should have priority over unsigned. - For la, unsigned 16-bit must use ori+addu rather than directly use ori. - Correct tests on 32-bit immediates with 64-bit predicates by sign-extending the immediate beforehand. For example, isInt<16>(0xffff8000) should be true and use addiu. Also split li/la testing into separate files due to their size. Reviewers: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10967 llvm-svn: 242139
2015-07-14 12:24:22 +00:00
la $5, symbol
[mips] Enable `la` pseudo instruction on 64-bit arch. This patch makes LLVM compatible with GAS. It accepts `la` pseudo instruction on arch with 64-bit pointers and just shows a warning. Differential Revision: https://reviews.llvm.org/D70202
2019-11-12 00:10:31 +03:00
# N32-NOT: :[[@LINE-1]]:3: warning: la used to load 64-bit address
# N64: :[[@LINE-2]]:3: warning: la used to load 64-bit address
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