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llvm-mirror/test/CodeGen/PowerPC/aix32-vector-vararg-caller-split.ll

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[PowePC][AIX] Handle variadic vector call operands. Patch adds support for passing vector call operands to variadic functions. Arguments which are fixed shadow GPRs and stack space even when they are passed in vector registers, while arguments passed through ellipses are passed in properly aligned GPRs if available and on the stack once all GPR arguments registers are consumed. Differential Revision: https://reviews.llvm.org/D97956
2021-03-06 17:33:35 +01:00
; RUN: llc -verify-machineinstrs -stop-before=ppc-vsx-copy -vec-extabi \
[PowerPC][AIX] Handle variadic vector formal arguments. Patch adds support for passing vector arguments to variadic functions. Arguments which are fixed shadow GPRs and stack space even when they are passed in vector registers, while arguments passed through ellipses are passed in(properly aligned GPRs if available and on the stack once all GPR arguments registers are consumed. Differential Revision: https://reviews.llvm.org/D97485
2021-03-04 16:56:53 +01:00
; RUN: -mcpu=pwr7 -mtriple powerpc-ibm-aix-xcoff < %s 2>&1 | \
; RUN: FileCheck %s
define void @caller() {
entry:
[PowePC][AIX] Handle variadic vector call operands. Patch adds support for passing vector call operands to variadic functions. Arguments which are fixed shadow GPRs and stack space even when they are passed in vector registers, while arguments passed through ellipses are passed in properly aligned GPRs if available and on the stack once all GPR arguments registers are consumed. Differential Revision: https://reviews.llvm.org/D97956
2021-03-06 17:33:35 +01:00
%call = tail call <4 x i32> (double, double, double, ...) @split_spill(double 0.000000e+00, double 1.000000e+00, double 2.000000e+00, <4 x i32> <i32 1, i32 2, i32 3, i32 4>)
[PowerPC][AIX] Handle variadic vector formal arguments. Patch adds support for passing vector arguments to variadic functions. Arguments which are fixed shadow GPRs and stack space even when they are passed in vector registers, while arguments passed through ellipses are passed in(properly aligned GPRs if available and on the stack once all GPR arguments registers are consumed. Differential Revision: https://reviews.llvm.org/D97485
2021-03-04 16:56:53 +01:00
ret void
}
declare <4 x i32> @split_spill(double, double, double, ...)
[PowePC][AIX] Handle variadic vector call operands. Patch adds support for passing vector call operands to variadic functions. Arguments which are fixed shadow GPRs and stack space even when they are passed in vector registers, while arguments passed through ellipses are passed in properly aligned GPRs if available and on the stack once all GPR arguments registers are consumed. Differential Revision: https://reviews.llvm.org/D97956
2021-03-06 17:33:35 +01:00
; CHECK: ADJCALLSTACKDOWN 64, 0, implicit-def dead $r1, implicit $r1
; CHECK: [[VECCONSTADDR:%[0-9]+]]:gprc = LWZtoc %const.0, $r2 :: (load 4 from got)
; CHECK: [[VECCONST:%[0-9]+]]:vsrc = LXVW4X $zero, killed [[VECCONSTADDR]] :: (load 16 from constant-pool)
; CHECK: [[STACKOFFSET:%[0-9]+]]:gprc = LI 48
; CHECK: STXVW4X killed [[VECCONST]], $r1, killed [[STACKOFFSET]] :: (store 16)
; CHECK-DAG: [[ELEMENT1:%[0-9]+]]:gprc = LWZ 48, $r1 :: (load 4)
; CHECK-DAG: [[ELEMENT2:%[0-9]+]]:gprc = LWZ 52, $r1 :: (load 4)
; CHECK: [[FLOAT1ADDR:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.1, $r2 :: (load 4 from got)
; CHECK: [[FLOAT1:%[0-9]+]]:f4rc = LFS 0, killed [[FLOAT1ADDR]] :: (load 4 from constant-pool)
; CHECK: [[DOUBLE1:%[0-9]+]]:f8rc = COPY [[FLOAT1]]
; CHECK: [[FLOAT2ADDR:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.2, $r2 :: (load 4 from got)
; CHECK: [[FLOAT2:%[0-9]+]]:f4rc = LFS 0, killed [[FLOAT2ADDR]] :: (load 4 from constant-pool)
; CHECK: [[DOUBLE2:%[0-9]+]]:f8rc = COPY [[FLOAT2]]
; CHECK: [[DZERO:%[0-9]+]]:vsfrc = XXLXORdpz
; CHECK: [[DTOI1:%[0-9]+]]:gprc = LIS 16368
; CHECK: [[DTOI2:%[0-9]+]]:gprc = LIS 16384
; CHECK: [[IZERO:%[0-9]+]]:gprc = LI 0
; CHECK-DAG: $f1 = COPY [[DZERO]]
; CHECK-DAG: $r3 = COPY [[IZERO]]
; CHECK-DAG: $r4 = COPY [[IZERO]]
; CHECK-DAG: $f2 = COPY [[DOUBLE1]]
; CHECK-DAG: $r5 = COPY [[DTOI1]]
; CHECK-DAG: $r6 = COPY [[IZERO]]
; CHECK-DAG: $f3 = COPY [[DOUBLE2]]
; CHECK-DAG: $r7 = COPY [[DTOI2]]
; CHECK-DAG: $r8 = COPY [[IZERO]]
; CHECK-DAG: $r9 = COPY [[ELEMENT1]]
; CHECK-DAG: $r10 = COPY [[ELEMENT2]]
; CHECK: BL_NOP <mcsymbol .split_spill[PR]>, csr_aix32_altivec, implicit-def dead $lr, implicit $rm, implicit $f1, implicit $r3, implicit $r4, implicit $f2, implicit $r5, implicit $r6, implicit $f3, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1, implicit-def $v2
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